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논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 대한전자공학회 JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE Journal of Semiconductor Technology and Science Vol.23 No.1
- 발행연도
- 2023.2
- 수록면
- 8 - 16 (9page)
- DOI
- 10.5573/JSTS.2023.23.1.8
이용수
초록· 키워드
오류제보하기
In this study, we present the electrical characteristics of the multiple nanosheet tunneling field-effect transistors (MNSTFETs) based on the polycrystalline silicon (poly-Si) depending on the grain boundary (GB)-locations. The effects of the GB are analyzed for 5 locations and they are compared with the device without the GB. When the GB was located in the tunneling region, the electrical performances were the most inferior compared with the device without the GB. In addition, it shows the electrical characteristics of 125 samples of the MNSTFETs compared with the multiple nanosheet metal-oxide-semiconductor field-effect transistors (MNSMOSFETs). The standard deviations (SDs) of the threshold voltage (VT) of MNSTFET and MNSMOSFET are 3.90 mV and 8.31 mV, respectively. If the GB is not located at 24 nm, the SDs of the average of subthreshold swing (SS<SUB>ave</SUB>) are 1.50 mV/dec and 4.16 mV/dec, respectively. This simulation shows that the MNSTFET has smaller effect depending on the GB location than the MNSMOSFET.
목차
Abstract
I. INTRODUCTION
II. DEVICE STRUCTURE AND SIMULATION METHOD
III. RESULTS AND DISCUSSION
IV. CONCLUSIONS
REFERENCES
참고문헌 (15)
참고문헌 신청
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Veeraraghavan, S., and Fossum, J. G. “Shortchannel effects in SOI MOSFETs.” IEEE Transactions on Electron Devices, vol. 36, no. 3, pp. 522-528, Mar. 1989.
Chandar, D. B., Vadthiya, N., Kumar, A., and Mishra, R. A. “Suppression of short channel effects (SCEs) by dual material gate vertical surrounding gate (DMGVSG) MOSFET: 3-D TCAD simulation.” Procedia Engineering, vol. 64, pp. 125-132, Nov. 2013.
Bangsaruntip, S., Cohen, G. M., Majumdar, A., and Sleight, J. W. “Universality of short-channel effects in undoped-body silicon nanowire MOSFETs.” IEEE Electron Device Letters, vol. 31, no. 9, pp. 903-905, Sep. 2010.
Choi, W. Y., Park, B. G., Lee, J. D., and Liu, T. J. K. “Tunneling field-effect transistors (TFETs) with subthreshold swing (SS) less than 60 mV/dec.” IEEE Electron Device Letters, vol. 28, no. 8, pp. 743-745, Aug. 2007.
Veeraraghavan, S., and Fossum, J. G. “Shortchannel effects in SOI MOSFETs.” IEEE Transactions on Electron Devices, vol. 36, no. 3, pp. 522-528, Mar. 1989.
Chandar, D. B., Vadthiya, N., Kumar, A., and Mishra, R. A. “Suppression of short channel effects (SCEs) by dual material gate vertical surrounding gate (DMGVSG) MOSFET: 3-D TCAD simulation.” Procedia Engineering, vol. 64, pp. 125-132, Nov. 2013.
Bangsaruntip, S., Cohen, G. M., Majumdar, A., and Sleight, J. W. “Universality of short-channel effects in undoped-body silicon nanowire MOSFETs.” IEEE Electron Device Letters, vol. 31, no. 9, pp. 903-905, Sep. 2010.
Choi, W. Y., Park, B. G., Lee, J. D., and Liu, T. J. K. “Tunneling field-effect transistors (TFETs) with subthreshold swing (SS) less than 60 mV/dec.” IEEE Electron Device Letters, vol. 28, no. 8, pp. 743-745, Aug. 2007.
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