지원사업
학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
커뮤니티
연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 자료유형
- 학술대회자료
- 저자정보
- 발행연도
- 2010.11
- 수록면
- 194 - 197 (4page)
이용수
초록· 키워드
오류제보하기
In this paper, a 65nm 1.2V 7-bit 1GSPS A/D converter with a self-calibration technique is proposed. The A/D converter is based on a folding-interpolation structure whose folding rate is 2, interpolation rate is 8. An offset self-calibration circuit with a feedback loop and a recursive digital code inspection is described. The offset self-calibration circuit reduces the variation of the offset voltage, due to process mismatches, parasitic resistors, and parasitic capacitances. The chip has been fabricated with a 65nm 1-poly 6-metal CMOS technology. The effective chip area is 0.87㎟ and the power consumption is about 110mW at 1.2V power supply. The measured SNDR is
about 38.48dB when the input frequency is 250MHz at 1GHz sampling frequency. The measured SNDR is 3dB higher than the same ADC without any calibration.
about 38.48dB when the input frequency is 250MHz at 1GHz sampling frequency. The measured SNDR is 3dB higher than the same ADC without any calibration.
목차
Abstract
Ⅰ. INTRODUCTION
Ⅱ. ARCHITECTURE AND CIRCUIT DEGIGN
Ⅲ. MEASURED RESULTS
Ⅳ. CONCLUSION
ACKNOWLEDGMENTS
REFERENCE
참고문헌 (0)
참고문헌 신청함께 읽어보면 좋을 논문
논문 유사도에 따라 DBpia 가 추천하는 논문입니다. 함께 보면 좋을 연관 논문을 확인해보세요!
-
Offset Self-Calibration 기법을 적용한 1.2V 7-bit 800MSPS Folding-Interpolation A/D 변환기의 설계
전자공학회논문지-SD
2010 .03
-
자가 보정 회로를 포함하는 10비트 500MS/s 폴딩-인터폴레이팅 A/D 변환기
대한전자공학회 학술대회
2010 .11
-
Offset Calibration 기법을 적용한 3.3V 8-bit 1GS/s Folding-Interpolation A/D 변환기의 설계
대한전자공학회 학술대회
2008 .05
-
자체보정 벡터 발생기를 이용한 7-bit 2GSPS A/D Converter의 설계
전자공학회논문지-SD
2011 .04
-
A 10-b 500 MS/s CMOS Folding A/D Converter with a Hybrid Calibration and a Novel Digital Error Correction Logic
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
2012 .03
-
광디스크의 디지털 리드-채널을 위한 1.2V 7-bit 1GSPS CMOS Folding/Interpolation ADC
대한전자공학회 학술대회
2008 .05
-
A 6-bit 1GSPS Folding CMOS A/D Converter For a High Speed Communication Systems
ICEIC : International Conference on Electronics, Informations and Communications
2008 .06
-
1.8V 12-bit 10MSPS Folding/Interpolation CMOS Analog-to-Digital Converter의 설계
전자공학회논문지-SD
2008 .11
-
A High Precision CMOS Folding A/D Converter with an Odd Number of Folding Blocks
대한전자공학회 ISOCC
2013 .11
-
1.8V 12-bit 80MSPS Folding/Interpolation CMOS Analog to Digital Converter의 설계
대한전자공학회 학술대회
2007 .05
-
An 8-bit CMOS Current-Mode Folding and Interpolation A / D Converter with Three-Level Folding Amplifiers
대한전자공학회 기타 간행물
1996 .01
-
새로운 디지털 인코딩 기법을 적용한 8비트 1GS / s 프랙셔널 폴딩 - 인터폴레이션 ADC
전자공학회논문지
2013 .01
-
A Voltage-Controlled Capacitance Offset Calibration Technique for High Resolution Dynamic Comparator
대한전자공학회 ISOCC
2009 .11
-
8b 2GSPS Folding-Interpolation ADC With Digital Error Correction
대한전자공학회 ISOCC
2012 .11
-
Low Power 6-b CMOS Folding-Interpolating A/D Converter
ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications
2007 .07
-
An 8-b 1GS/s Fractional Folding CMOS Analog-to-Digital Converter with an Arithmetic Digital Encoding Technique
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
2013 .10
-
12-bit 80MSPS Double Folding/Interpolation A/D Converter
대한전자공학회 ISOCC
2008 .11
-
A 1.2-V 1-GS/s 7-bit Folding Interpolation CMOS A/D 변환기의 설계
대한전자공학회 학술대회
2009 .05
-
전치 증폭기 공유 기법을 이용한 8-bit 10-MSample/s Folding & Interpolation ADC
전기전자학회논문지
2013 .09
-
A 9-Bit 80-MS/s CMOS Pipelined Folding A/D Converter with an Offset Canceling Technique
[ETRI] ETRI Journal
2007 .06
이 논문의 저자 정보
최근 본 자료
댓글(0)
0
UCI(KEPA) : I410-ECN-0101-2013-569-001489275