지원사업
학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
커뮤니티
연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 대한전자공학회 JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE Journal of Semiconductor Technology and Science Vol.9 No.2
- 발행연도
- 2009.6
- 수록면
- 75 - 79 (5page)
이용수
초록· 키워드
오류제보하기
A system-on-a-chip communication architecture has a significant impact on the performance and power consumption of modern multi-processors system-on-chips (MPSoCs). However, customization of such architecture for a specific application requires the exploration of a large design space. Thus, system designers need tools to rapidly explore and evaluate communication architectures. In this paper we present the method for application-specific low-power bus architecture synthesis at system-level. Our paper has two contributions. First, we build a bus power model of AMBA AXI bus communication architecture. Second, we incorporate this power model into a low-power architecture exploration algorithm that enables system designers to rapidly explore the target bus architecture. The proposed exploration algorithm reduces power consumption by 20.1% compared to a maximally connected reduced matrix, and the area is also reduced by 20.2% compared to the maximally connected reduced matrix.
목차
Abstract
Ⅰ. Introduction
Ⅱ. RELATED WORKS
Ⅲ. POWER MODELS
Ⅳ. BUS SYNTHESIS FLOW
Ⅴ. EXPRIMENTAL RESULTS
Ⅵ. SUMMARY
REFERENCES
참고문헌 (0)
참고문헌 신청함께 읽어보면 좋을 논문
논문 유사도에 따라 DBpia 가 추천하는 논문입니다. 함께 보면 좋을 연관 논문을 확인해보세요!
-
System Level Architecture Evaluation and Optimization : an Industrial Case Study with AMBA3 AXI
대한전자공학회 ISOCC
2005 .10
-
Are You O.K! Architecture?
건축사
2007 .01
-
Exploring On-Chip Bus Architectures for Multi-Task Applications
대한전자공학회 ISOCC
2004 .10
-
AMBA 버스 기반의 SoC 시스템의 성능 향상을 위한 중재 알고리즘
대한전자공학회 학술대회
2006 .06
-
A Low Power Scan Design Architecture
대한전자공학회 ISOCC
2004 .10
-
AMBA AXI 기반의 효율적인 SoC 테스트 제어기 설계
대한전자공학회 학술대회
2009 .05
-
Problems of Modern Architecture
건축사
1969 .01
-
System Level Architecture Evaluation and Optimization : an Industrial Case Study with AMBA3 AXI
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
2005 .12
-
High Performance On-Chip-Network Architecture with Multiple Channels and Dual Routing
대한전자공학회 ISOCC
2008 .11
-
[特輯]Computer Network Architecture
정보과학회지
1986 .12
-
AMBA(Advanced Microcontroller Bus Architecture) 기반의 IPSec 암호 프로세서의 구현
대한전기학회 학술대회 논문집
2004 .11
-
Exploring On-Chip Bus Architectures for Multitask Applications
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
2004 .12
-
Efficient Hardware Architecture with Data-Reuse and Fast Search Algorithm Support for Low Complexity Motion Estimation
ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications
2009 .07
-
효율적인 데이터 전송과 하드웨어 최적화를 위한 AMBA AXI4 BUS Interface 구현
융합신호처리학회 논문지
2014 .01
-
An Analysis of On-Chip-Network Communication Properties on Shared and Multiple Channel Architecture
ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications
2008 .07
-
A Novel High Performance Bus Topology for Parallel Processing in MPSoC
ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications
2009 .07
-
A High-Performance On-Chip Bus Architecture Design
정보 및 제어 논문집
2016 .04
-
A High-Performance On-Chip Bus Architecture Design
대한전자공학회 학술대회
2016 .04
-
Architectures and Features
대한전자공학회 단기강좌
1991 .01
-
MPEG 시스템용 다중 작업에 적합한 양방향 버스 구조
전자공학회논문지-SD
2005 .04
이 논문의 저자 정보
최근 본 자료
댓글(0)
0
UCI(KEPA) : I410-ECN-0101-2009-569-018470054