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논문 기본 정보

자료유형
학술저널
저자정보
Byeongkwan Jin (Chungnam National University) Mookyoung Yoo (Chungnam National University) Sanggyun Kang (Chungnam National University) Hyeoktae Son (Chungnam National University) Kyounghwan Kim (Chungnam National University) Jihyang Wi (Chungnam National University) Gibae Nam (Chungnam National University) Hyoungho Ko (Chungnam National University)
저널정보
대한전자공학회 JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE Journal of Semiconductor Technology and Science Vol.24 No.4
발행연도
2024.8
수록면
343 - 354 (12page)
DOI
10.5573/JSTS.2024.24.4.343

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초록· 키워드

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This paper proposes a second-order delta-sigma modulator based on a differential difference amplifier without an input buffer. We introduce a delta-sigma modulator in this study with a structure that eliminates the need for an input buffer, thereby effectively mitigating the area and power consumption issues inherent in existing delta-sigma modulators employing an input buffer. The proposed circuit comprises two integrators for forming a loop filter, a comparator serving as a quantizer, and additional sub-blocks. Fabrication of the proposed circuit is carried out using the TSMC 0.18-μm RFCMOS process, resulting in an active area of 0.56 mm². The application of a differential difference amplifier input stage in this paper achieves a high-input impedance, consequently reducing the extra area and power consumption associated with the drawbacks of an input buffer. The signal-to-noise ratio (SNR) of the proposed circuit attains a maximum level of 76 dB, and the effective number of bits (ENOB) is 12.3 bits.

목차

Abstract
I. INTRODUCTION
II. ARCHITECTURE
III. CIRCUIT DESCRIPTION
IV. MEASUREMENT RESULTS
V. CONCLUSIONS
REFERENCES

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