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논문 기본 정보

자료유형
학술저널
저자정보
T. A. Anusudha (Vellore Institute of Technology)
저널정보
한국전기전자재료학회 Transactions on Electrical and Electronic Materials Transactions on Electrical and Electronic Materials 제24권 제1호
발행연도
2023.2
수록면
91 - 101 (11page)
DOI
https://doi.org/10.1007/s42341-022-00424-6

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The functional characteristics of the real memristor devices are modeled through various mathematical approaches with/without window functions. Nevertheless, these models do not provide accurate performance metrics compared to physical memristor devices. In the backdrop of these prevailing issues pertaining to the modeling of memristors, we propose here yet another memristor model namely “Three Dimensional Voltage Adaptive Memristor (3DVAM)”, which provides a versatile solution to the nonlinearity in the ionic drift as well as the adopted parameters being matched with the physical memristor device. The proposed 3DVAM model is found to retain the expected nonlinearity with kinetic dopants by exhibiting the Pinched Hysteresis Loop (PHL) for large applied voltage [± 3 V ≤ v ≤ ± 13 V] without using the window functions. Interestingly, the flexibility of our proposed memristor model is proven by its adaptability with respect to applied frequency response at the highest being 10 MHz (lowest being 0.01 Hz) and that facilitates to enhance the degree of nonlinearity in current–voltage characteristics by the modality of the incorporation of 3D geometrical as well as material parameters for the first time. Thus, the 3DVAM model facilitates flexibility in fitting into other memristor models; it is proven by its compatibility with well-adapted VTEAM as well as linear ion drift models. Finally, the model offers high chip density and performs the logic operation for the applied voltage ( v ), which is as low as ± 0.45 V as compared to its CMOS counterpart.

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