지원사업
학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
커뮤니티
연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 한국전자파학회JEES Journal of Electromagnetic Engineering And Science Journal of Electromagnetic Engineering And Science Vol.22 No.3
- 발행연도
- 2022.5
- 수록면
- 302 - 308 (7page)
이용수
초록· 키워드
오류제보하기
This paper presents a single-stage 12-times frequency multiplier composed of an invented harmonic generator (HG) and a modified cascade buffer. The reliable output frequency band is guaranteed from 16 GHz to 28 GHz (54.5% frequency range). The whole band is divided to 256 subsidiary frequency bands by applying 8-bit digitally controlled capacitor banks of LC (inductor and capacitor)-tuned output. The invented HG architecture is based on a double-balanced mixer, but the bottom and top differential pairs are appropriately biased to generate the required turn-on time, 𝜏, for obtaining the more dominant desired 12th harmonic. In addition, to reduce power consumption and conversion gain variation for the target frequency band, a negative-g<SUB>m</SUB> differential pair is added to the HG core in parallel to enhance the equivalent parasitic resistance, which is directly proportional to the HG gain. Newly created automatic constant amplitude control is able to keep the HG amplitude output constant as well as keep it from oscillating. Further desired harmonic amplification and unwanted suppression can be achieved by the proposed cascode buffer. The proposed 12-times multiplier is fabricated on a 65-nm CMOS (complementary metal-oxide-semiconductor) process and successfully tested. Chip die size is 0.4 mm², and power consumption is only 4 mW.
목차
Abstract
I. INTRODUCTION
II. 12-TIMES FREQUENCY MULTIPLIER DESIGN
III. FABRICATION AND MEASUREMENT
IV. SUMMARY AND CONCLUSION
REFERENCES
참고문헌 (0)
참고문헌 신청함께 읽어보면 좋을 논문
논문 유사도에 따라 DBpia 가 추천하는 논문입니다. 함께 보면 좋을 연관 논문을 확인해보세요!
-
22.5–27GHz High Suppression Frequency Tripler with Excellent Output Power Flatness in 65nm CMOS
IDEC Journal of Integrated Circuits and Systems
2021 .01
-
폐슬러지의 열처리 후 잔류물 내 수은 함량 및 용출 특성
한국폐기물자원순환학회지
2023 .06
-
A New Third-Order Harmonic Mixer Design for Microwave Radar
한국전자통신학회 논문지
2020 .01
-
A Millimeter-wave Up-converter for 28-GHz 5G Mobile Systems in 65-nm CMOS Technology
IDEC Journal of Integrated Circuits and Systems
2023 .01
-
A Novel Fluorescent Nanoswitch Based on Carbon Dots for Sensitive Detection of Hg2+ and I-
NANO
2017 .01
-
UHF FRS 대역 CMOS PLL 주파수 합성기 설계
한국전자파학회논문지
2017 .12
-
Sub-harmonic Injection Locking을 이용한 주파수 합성기 설계
대한전자공학회 학술대회
2016 .06
-
A Novel Direct-Binary Amplitude Modulator Integrated with a 16-Times Frequency Multiplier for 5G+ Applications
Journal of Electromagnetic Engineering And Science
2024 .11
-
A 1-V 3.8-mW Fractional-N PLL Synthesizer with 25% Duty-Cycle LO Generator in 65 nm CMOS for Bluetooth Applications
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
2018 .12
-
A V-Band CMOS Frequency Doubler in 65 nm CMOS
IDEC Journal of Integrated Circuits and Systems
2024 .07
-
Initial Frequency Preset Technique for Fast Locking Fractional-N PLL Synthesizers
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
2017 .08
-
Ka 대역 탐색기용 다기능 초소형 주파수 합성기
한국전자파학회논문지
2016 .10
-
Mercury Ions Mediated Phosphorus Containing Carbon Dots as Fluorescent Probe for Biothiols Screening
NANO
2018 .01
-
Research on In-band Spurious Evasion Techniques of Hybrid Frequency Synthesizer
전기전자학회논문지
2015 .06
-
A CMOS Receiver Front-end with Fractional-N PLL Synthesizer for MedRadio Applications
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
2018 .12
-
28-nm CMOS 공정을 이용한 고속 첩 신호 합성기 설계
한국전자파학회논문지
2023 .04
-
Direct Digital Synthesizer를 이용한 도플러 모의 장치
한국통신학회 학술대회논문집
2023 .02
-
브로민화수은 (I)(Hg₂Br₂) 증착공정에서 자체확산 연구
한국결정성장학회지
2024 .04
-
Design of Low-Power 24-GHz CMOS Mixer
제어로봇시스템학회 논문지
2021 .12
-
[엔지니어링 리포트] 건설사업관리를 위한 HG BIM Viewer
건축
2021 .02
이 논문의 저자 정보
최근 본 자료
댓글(0)
0