지원사업
학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
커뮤니티
연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 대한전자공학회 JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE Journal of Semiconductor Technology and Science Vol.10 No.3
- 발행연도
- 2010.9
- 수록면
- 232 - 239 (8page)
이용수
초록· 키워드
오류제보하기
By using the clock timing control at transmitter (TX), the crosstalk-induced jitter (CIJ) is compensated for in the 2-bit parallel data transmission through the coupled microstrip lines on printed circuit board (PCB). Compared to the authors’ prior work, the delay block circuit is simplified by combining a delay block with a minimal number of stages and a 3-to-1 multiplexer. The d elayblock generates three clock signals with different delays corresponding to the channel delay of three different signal modes. The 3-to-1 multiplexer selects one of the three clock signals for TX timing depending on the signal mode. The TX is implemented by using a 0.18 ㎛ CMOS process. The measurement shows that the TX reduces the RX jitters by about 38 ps at the data rates from 2.6 Gbps to 3.8 Gbps. Compared to the authors’ prior work, the amount of RX Jitter reduction increases from 28 ps to 38 ps by using the improved implementation.
목차
Abstract
Ⅰ. INTRODUCTION
Ⅱ. CIJ COMPENSATION USING TX CLOCK TIMING
Ⅲ. CIRCUIT IMPLEMENTATION
Ⅳ. MEASUREMENT RESULTS
Ⅴ. CONCLUSIONS
ACKNOWLEDGMENTS
REFERENCES
참고문헌 (8)
참고문헌 신청
1. [학술지(정기간행물)] - K.Lee / 2008 / A Serpentine Guard Trace to Reduce the Far-End Crosstalk Voltage and the Crosstalk Induced Timing of Parallel Microstrip Lines / IEEE Transactions on Advanced Packaging 31 (4) : 809 ~ 817
2. [학술대회논문] - K. Lee / 2007 / Serpentine Guard Trace to Reduce Far-end Crosstalk and Even-Odd Mode Velocity Mismatch of Microstrip Lines by More than 40% / ECTC : 329 ~ 332
3. [학술지(정기간행물)] - K.Lee / 2010 / Serpentine Microstrip Lines with Zero Far-End Crosstalk for Parallel High-Speed DRAM Interfaces / IEEE Transactions on Advanced Packaging 33 (3) : 552 ~ 558
4. [학술지(정기간행물)] - S.K. Lee / 2008 / FEXT-eliminated stub-alternated microstrip line for multi-gigabit/second parallel links / Electronics Letters 44 (4) : 272 ~ 273
5. [학술지(정기간행물)] - D.G. Kam / 2003 / A New Twisted Differential Line Structure on High-Speed Printed Circuit Boards to Enhance Immunity to Crosstalk and External Noise / IEEE Microwave and Wireless Components Letters 13 (9)
2. [학술대회논문] - K. Lee / 2007 / Serpentine Guard Trace to Reduce Far-end Crosstalk and Even-Odd Mode Velocity Mismatch of Microstrip Lines by More than 40% / ECTC : 329 ~ 332
3. [학술지(정기간행물)] - K.Lee / 2010 / Serpentine Microstrip Lines with Zero Far-End Crosstalk for Parallel High-Speed DRAM Interfaces / IEEE Transactions on Advanced Packaging 33 (3) : 552 ~ 558
4. [학술지(정기간행물)] - S.K. Lee / 2008 / FEXT-eliminated stub-alternated microstrip line for multi-gigabit/second parallel links / Electronics Letters 44 (4) : 272 ~ 273
5. [학술지(정기간행물)] - D.G. Kam / 2003 / A New Twisted Differential Line Structure on High-Speed Printed Circuit Boards to Enhance Immunity to Crosstalk and External Noise / IEEE Microwave and Wireless Components Letters 13 (9)
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