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논문 기본 정보
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- 대한전자공학회 JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE Journal of Semiconductor Technology and Science Vol.10 No.1
- 발행연도
- 2010.3
- 수록면
- 1 - 10 (10page)
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This paper proposes a two-phase clocked adiabatic static CMOS logic (2PASCL) circuit that utilizes the principles of adiabatic switching and energy recovery. The low-power 2PASCL circuit uses two complementary split-level sinusoidal power supply clocks whose height is equal to V<SUB>dd</SUB>. It can be directly derived from static CMOS circuits. By removing the diode from the charging path, higher output amplitude is achieved and the power consumption of the diode is eliminated. 2PASCL has switching activity that is lower than dynamic logic. We also design and simulate NOT, NAND, NOR, and XOR logic gates on the basis of the 2PASCL topology. From the simulation results, we find that 2PASCL 4-inverter chain logic can save up to 79% of dissipated energy as compared to that with a static CMOS logic at transition frequencies of 1 to 100 ㎒. The results indicate that 2PASCL technology can be advantageously applied to low power digital devices operated at low frequencies, such as radio-frequency identifications (RFIDs), smart cards, and sensors.
목차
Abstract
Ⅰ. INTRODUCTION
Ⅱ. CMOS CIRCUITS VIS-A-VIS ADIABATIC LOGIC CIRCUITS
Ⅲ. TWO PHASE CLOCKED ADIABATIC STATIC CMOS LOGIC
Ⅳ. SIMULATION RESULTS AND DISCUSSION
Ⅴ. POWER CLOCK GENERATOR
Ⅵ. DISCUSSION
Ⅶ. CONCLUSIONS
REFERENCES
참고문헌 (18)
참고문헌 신청
1. [학술지(정기간행물)] - K. Roy / 2003 / A leakage current mechanism and leakage reduction techniques in deep-submicrometer CMOS circuits / Proc. IEEE 91 (2) : 305 ~ 327
2. [학술지(정기간행물)] - W.C. Athas / 1994 / Low-power digital systems based on adiabatic-switching principles / Very Large Scale Integration (VLSI) Syst 2 (4) : 398 ~ 407
3. [학술대회논문] - A Kramer / 1994 / Adiabatic Computing with the 2N- 2N2D logic family in Proc. VLSI Circuits Dig. Tech. Papers / IEEE Symposium on : 25 ~ 26
4. [학술지(정기간행물)] - A.G. Dickinson / 1995 / Adiabatic dynamic logic / Solid-States Circuits, IEEE Journal 30 (3) : 311 ~ 315
5. [학술지(정기간행물)] - Y. Moon / 1996 / An efficient charge recovery logic circuit / Solid-States Circuits., IEEE Journal 31 (4) : 514 ~ 522
2. [학술지(정기간행물)] - W.C. Athas / 1994 / Low-power digital systems based on adiabatic-switching principles / Very Large Scale Integration (VLSI) Syst 2 (4) : 398 ~ 407
3. [학술대회논문] - A Kramer / 1994 / Adiabatic Computing with the 2N- 2N2D logic family in Proc. VLSI Circuits Dig. Tech. Papers / IEEE Symposium on : 25 ~ 26
4. [학술지(정기간행물)] - A.G. Dickinson / 1995 / Adiabatic dynamic logic / Solid-States Circuits, IEEE Journal 30 (3) : 311 ~ 315
5. [학술지(정기간행물)] - Y. Moon / 1996 / An efficient charge recovery logic circuit / Solid-States Circuits., IEEE Journal 31 (4) : 514 ~ 522
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UCI(KEPA) : I410-ECN-0101-2010-569-002142471