빌딩블록의 레이아웃 설계를 위한 계층적 배치 방법 ( A Hierarchical Placement Method for Building Block Layout Design )

강병익 ,  이건배

전자공학회논문지-A

1996 .11

Building Block Placement and Routing

정정화

CAD기술특강

1989 .01

A HIERARCHICAL ALGORITHM FOR GATE MATRIX LAYOUT

Kazuhi ,  o Yamazaki ,  Shoichi 외 2명

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1989 .01

A NEW PIN ASSIGNMENT ALGORITHM FOR BUILDING BLOCK LAYOUT

Sang Gil Choi ,  Chong Min Kyung

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1992 .01

Efficient Area Estimation and Optimization for Building Block Layout

Katsumi Te ,  ai ,  Katsumi Ha 외 2명

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1993 .01

순환형 공정의 Block Layout 설계를 위한 최적화 모형

손동희

대한산업공학회 춘계공동학술대회 논문집

2013 .05

Efficient Floorplanning by O-Tree with Genetic Algorithm

Tetsuta ,  ou Ha ,  a 외 2명

ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications

2008 .07

조립된 Building Block IC의 설계디자인의 문제 ( The Layout Design of Structured Building Block Integrated Circuit )

이천희

전자공학회논문지

1987 .11

IN-PLACE LINEAR ORDERING ALGORITHM FOR CONSTRUCTIVE PLACEMENT OF ROW-BASED LAYOUT DESIGN

Byung Ik Kang ,  Jong Wha Chong

ICVC : International Conference on VLSI and CAD

1989 .01

행정중심도시 공동주택 설계공모안에 나타난 탑상형 주동의 계획 특성에 관한 연구

김형진 ,  박찬규 ,  김영석

대한건축학회 논문집 - 계획계

2009 .08

DYNAMIC HIERARCHICAL PLACEMENT FOR SEA-OF-GATES

Chang Kyoung Eem ,  Kwang Ki Ryu ,  Jong Wha Chong

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1992 .01

A New Algorithm on VLSI-Block Placement Using Fuzzy Theory

Z. C. Gu ,  Shunichi Nakayama ,  Shoichi 외 4명

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1990 .01

Shaping Algorithms for Facility Layout Problems

Geun-Cheol Lee ,  Yeong-Dae Kim

대한산업공학회 춘계공동학술대회 논문집

1997 .04

AN OPTIMAL PIN ASSIGNMENT ALGORITHM WITH IMPROVEMENT OF CELL PLACEMENT IN STANDARD CELL LAYOUT

Shinichi Wakabayashi ,  Yoshihisa Kishimoto ,  Tetsushi Koide

대한전자공학회 기타 간행물

1996 .01

ANALOG LAYOUT SYSTEM : PLACEMENT , ROUTING , AND COMPACTION

Imbaby I Mahmoud ,  To ,  u Awashima 외 3명

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1992 .01

An Efficient Algorithm for Standard Cell Placement

Byung-Ik Kang

KITE JOURNAL OF ELECTRONICS ENGINEERING

1990 .01

중소 제조 기업의 LAYOUT 개선 사례 연구

정대권 ,  윤원영

대한산업공학회지

2015 .08

A Hierarchical Building Reconstruction Algorithm Using Edge and Area Information

Gi Mun Um ,  Chul Soo Ye ,  Kwae Hi Lee

ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications

1997 .01

3-Dimentional Block Placement of Force Directed Model with Cluster Growth

Hideyuki Tanaka ,  Katsumi Ha ,  ashima

ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications

2007 .07