지원사업
학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
커뮤니티
연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 한국정보통신학회JICCE Journal of information and communication convergence engineering Journal of information and communication convergence engineering Vol.14 No.4
- 발행연도
- 2016.12
- 수록면
- 268 - 271 (4page)
이용수
초록· 키워드
오류제보하기
An efficient inductive switching noise suppression technique for mixed-signal integrated circuits (ICs) using standard CMOS digital technology is proposed. The proposed design technique uses a parallel RC circuit, which provides a damping path for the switching noise. The proposed design technique is used for designing a mixed-signal circuit composed of a ring oscillator, a digital output buffer, and an analog noise sensor node for 0.13-μm CMOS digital IC technology. Simulation results show a 47% reduction in the on-chip inductive switching noise coupling from the noisy digital to the analog blocks in the same substrate without an additional propagation delay. The increased power consumption due to the damping resistor is only 67% of that of the conventional source damping technique. This design can be widely used for any kind of analog and high frequency digital mixed-signal circuits in CMOS technology.
목차
Abstract
I. INTRODUCTION
II. PROPOSED ON-CHIP INDUCTIVE NOISE SUPPRESSION TECHNIQUE
III. SIMULATION RESULTS
IV. DISCUSSION AND CONCLUSION
REFERENCES
참고문헌 (7)
참고문헌 신청
[학술지(정기간행물)] - D. K. Su / 1993 / Experimental results and modeling techniques for substrate noise in mixed-signal integrated circuits / IEEE Journal of Solid-State Circuits 28 (4) : 420 ~ 430
[학술대회논문] - P. Basedau / 1995 / A post processing method for reducing substrate coupling in mixed-signal integrated circuits / Proceedings of 1995 Symposium on VLSI Circuits (Digest of Technical Papers) : 41 ~ 42
[학술대회논문] - S. Ardalan / 2004 / An overview of substrate noise reduction techniques / Proceedings of 5th International Symposium on Quality Electronic Design (ISQED) : 291 ~ 296
[학술지(정기간행물)] - R. Senthinathan / 1992 / Noise immunity characteristics of CMOS receivers and effects of skewing/damping CMOS output driver switching waveform on the ‘simultaneous’ switching noise / Microelectronics Journal 23 (1) : 29 ~ 36
[학술지(정기간행물)] - P. Larsson / 1998 / Resonance and damping in CMOS circuits with onchip decoupling capacitance / IEEE Transactions on Circuits and Systems I : Fundamental Theory and Applications 45 (8) : 849 ~ 858
[학술대회논문] - P. Basedau / 1995 / A post processing method for reducing substrate coupling in mixed-signal integrated circuits / Proceedings of 1995 Symposium on VLSI Circuits (Digest of Technical Papers) : 41 ~ 42
[학술대회논문] - S. Ardalan / 2004 / An overview of substrate noise reduction techniques / Proceedings of 5th International Symposium on Quality Electronic Design (ISQED) : 291 ~ 296
[학술지(정기간행물)] - R. Senthinathan / 1992 / Noise immunity characteristics of CMOS receivers and effects of skewing/damping CMOS output driver switching waveform on the ‘simultaneous’ switching noise / Microelectronics Journal 23 (1) : 29 ~ 36
[학술지(정기간행물)] - P. Larsson / 1998 / Resonance and damping in CMOS circuits with onchip decoupling capacitance / IEEE Transactions on Circuits and Systems I : Fundamental Theory and Applications 45 (8) : 849 ~ 858
함께 읽어보면 좋을 논문
논문 유사도에 따라 DBpia 가 추천하는 논문입니다. 함께 보면 좋을 연관 논문을 확인해보세요!
-
Miniature CMOS Low Noise Amplifier in 0.18-㎛ Mixed-Signal (Twin-Well) CMOS Process
ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications
2015 .06
-
Sub-1V 밴드갭 기준 전압 생성 회로의 Noise 분석
대한전자공학회 학술대회
2020 .08
-
Characterization of a CMOS 135-GHz Low Noise Amplifier with Two Different Noise Measurement Methods
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
2018 .08
-
Low-noise, High-PSRR and Positive-TC Voltage Reference for a Temperature- and Supply-compensated CMOS Ring Oscillator
IEIE Transactions on Smart Processing & Computing
2019 .08
-
CMOS 이미지 센서의 암전류 잡음을 이용한 난수 발생기
한국정밀공학회 학술발표대회 논문집
2019 .10
-
Design of an Advanced CMOS Power Amplifier
Journal of Electromagnetic Engineering And Science
2015 .04
-
Design Method for Active-shunt-feedback Type Inductorless Low-noise Amplifiers in 65-nm CMOS
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
2020 .04
-
Noise analysis of cascode LNA with 65nm CMOS technology
한국정보통신학회논문지
2020 .05
-
6G 이동통신을 위한 65-㎚ CMOS 110-160 ㎓ 저잡음 증폭기
대한전자공학회 학술대회
2021 .11
-
효율적인 고성능 Eddy Current Displacement Sensor를 위한 CMOS Analog Front-End 회로구조 설계
대한전자공학회 학술대회
2022 .06
-
Design of Low-Power 24 ㎓ CMOS Low Noise Amplifier
제어로봇시스템학회 논문지
2021 .11
-
Design of Low Noise Amplifier Utilizing Input and Inter Stage Matching Circuits
한국정보통신학회논문지
2021 .06
-
A CMOS 전하 펌프 회로
대한전자공학회 학술대회
2024 .06
-
와전류 탐상 회로 성능 개선에 관한 연구
한국정보기술학회논문지
2015 .10
-
광대역 잡음제거 CMOS 저잡음 증폭기
대한전자공학회 학술대회
2020 .08
-
Design of Low-Power 24-GHz CMOS Mixer
제어로봇시스템학회 논문지
2021 .12
-
5.8 ㎓ CMOS 4-채널 송신 IC 기반의 4×4 무선전력전송 모듈
대한전자공학회 학술대회
2020 .11
-
180㎚ CMOS 2.4㎓ 저 위상 잡음 LC 탱크 발진기 설계
대한전자공학회 학술대회
2022 .06
-
CMOS 0.35㎛ 공정을 이용한 다중 에너지 하베스팅 센서노드 회로
대한전자공학회 학술대회
2015 .06
-
Modeling for Conducted Noise Simulation Considering Switching Characteristics on AC/DC Converter
ICPE(ISPE)논문집
2019 .05
이 논문의 저자 정보
최근 본 자료
댓글(0)
0
UCI(KEPA) : I410-ECN-0101-2023-004-000404500