A Clock-Feedthrough , Offset and Gain-Error Compensated Sample / Hold Circuit

Hi ,  oki Matsumoto ,  Zheng Tang 외 1명

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1991 .01

A SV-Sample/Hold Circuit compensated for Clock Feedthrough and Channel-Length Modulation Effect

Kenji OHNO ,  Hi ,  oki MATSUMOTO 외 1명

ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications

2005 .07

A CLOCK-FEEDTHROUGH-COMPENSATED CURRENT MEMORY CELL

Hi ,  oki Matsumoto ,  Zheng Tang 외 2명

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1992 .01

Clock Feedthrough 보상회로를 이용한 전류모드 시그마-델타 변조기의 설계

민병무 ,  황인철 ,  조규석 외 1명

대한전자공학회 학술대회

1994 .07

Clock Feedthrough 보상회로를 이용한 전류모드 시그마-델타 변조기의 설계 ( Design of Current-mode Sigma-Delta Modulator using Clock-feedthrough Compensation Circuit )

민병무 ,  황인철 ,  조규석 외 1명

대한전자공학회 학술대회

1994 .07

An Algorithm Analog-to-digital Converter Clock-feedthrough Compensated S2I Cells

Hyeong Woo Cha ,  Satomi Ogawa ,  Kenzo Watanabe

ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications

1996 .01

Linear Quadratic Regulation and Tracking using Output Feedback with Direct Feedthrough

Seungeun Kang ,  Jihyoung Cha ,  Sangho Ko

International Journal of Aeronautical and Space Sciences

2016 .12

A clock feedthrough-compensated current copier cell insensitive to channel length modulation effect

Hi ,  oki Matsumoto

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1994 .01

A Switched-Current Oversampled Sigma-Delta Modulator Insensitive to Clock Feedthrough Charge Effect

Hi ,  oki Matsumoto

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1994 .01

클럭 - 피드쓰루를 개선한 새로운 전류 기억 소자 ( New Current Memory Cell with Clock - feedthrough Reduction Scheme )

민병무 ,  김재완 ,  김수원

전자공학회논문지-D

1997 .01

공기베어링을 이용한 진공환경 운동전달용 피드스루

김경호 ,  박천홍 ,  황주호

한국정밀공학회 학술발표대회 논문집

2011 .06

Pulsed-V_dd: Synchronous Circuit Design without Clock Network

Yongsoo Ahn ,  Donkyu Baek ,  Dongsoo Lee 외 1명

대한전자공학회 ISOCC

2013 .11

이중 보간 방식을 이용한 CMOS 클록 데이터 복원회로

안희선 ,  이순재 ,  박원기 외 2명

대한전자공학회 학술대회

2009 .07

A High Speed and High Accuracy Sample and Hold Circuit

Sung Dae Lee ,  Soo Hyoung Lee ,  Jae Hyung Lee 외 3명

ICEIC : International Conference on Electronics, Informations and Communications

1998 .01

A High Speed and High Accuracy Sample and Hold Circuit

Lee Sung-Dae ,  Lee Soo-Hyoung ,  Lee Jae-Hyung 외 3명

ICEIC : International Conference on Electronics, Informations and Communications

1998 .08

Clock Design Techniques Considering Circuit Reliability

Yonghwan Kim ,  Minseok Kang ,  Kyoung-Hwan Lim 외 4명

대한전자공학회 ISOCC

2011 .11

Design Methodologies for Reliable Clock Networks

Deokjin Joo ,  Minseok Kang ,  Taewhan Kim

Journal of Computing Science and Engineering

2012 .12

안전한 MCU 클럭 보호를 위한 온칩 클럭 검사기 기반 자동화된 글리치 프리 백업 클럭 변환 기법

안중현 ,  박대진 ,  조정훈

대한전자공학회 학술대회

2015 .06

Design of Clock Gears for Low-power Media Bus

Yong-Hwan Lee ,  Hoon-Ju Chung ,  Chang-Gu Rho

ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications

2008 .07

Voltage Scaling 기반의 저전력 전류메모리 회로 설계

김성권 ,  조태일 ,  김종운 외 2명

한국전자통신학회 논문지

2016 .01