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논문 기본 정보
- 자료유형
- 학술대회자료
- 저자정보
- 발행연도
- 2010.11
- 수록면
- 392 - 395 (4page)
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초록· 키워드
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This paper presents a two-stage pseudo-differential amplifier. Rail-to-rail operations are achieved by using bulk terminals as the inputs. The positive feedback technique is used to enhance the transconductance with negative conductance. The bulk terminals of all transistors are carefully biased to lower their threshold voltages (V<SUB>th</SUB>) and maximize signal swing. Using a standard 0.18-μm CMOS technology, measurement results demonstrate that gain-bandwidth product is 0.97MHz. The settling time for a 0.7-V<SUB>pp</SUB step is 2.1μs. The input referred noise is 0.14mV at 1MHz. All the circuits dissipate 0.107μW under a single 0.7-V power supply.
목차
Abstract
Ⅰ. INTRODUCTION
Ⅱ. THE BULK-DRIVEN OPERATIONAL AMPLIFIER
Ⅲ. CIRCUIT ARCHITECTURE
Ⅳ. EXPERIMENTAL RESULTS
Ⅴ. CONCLUSION
ACKNOWLEDGMENT
REFERENCES
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