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학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
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연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 자료유형
- 학술대회자료
- 저자정보
- 저널정보
- 대한전자공학회 ICEIC : International Conference on Electronics, Informations and Communications ICEIC : 2010
- 발행연도
- 2010.6
- 수록면
- 19 - 22 (4page)
이용수
초록· 키워드
오류제보하기
Polymer random access memory (PoRAM) is the next-generation of nonvolatile memory device which can overcome density and efficient problems of the flash memory. PoRAM has a diode cell switch to reduce the cell size without loss of the leakage current and cross-point resistor structure composed of an improved organic material (a conductive small-molecule organic layer embedded with Ni nanocrystals surrounded by a NiO tunneling barrier) with bi-stable electric switching characteristic between the top and bottom aluminum (Al) electrodes. In this paper, we propose that a sub-block configuration, RPE(read/program/erase) operation concepts, RPE driver system which supplies the high voltage for the each operation and a current sense amplifier suitable for PoRAM according to the control logic signal. The proposed sub-block is configured with the unit cell in the matrix structure that is composed of a row/column line, local row/column decoders, charge/discharge circuit, input/output (I/O) circuit, sense amplifiers and RPE driver with the control logic signal. The RPE driver system generates the operation voltages effectively which are applied the memory array, because the core circuit requires the stable high voltage exactly during the fast time. A memory array of a sub-block with the diode cell switch was fabricated for the 0.13um CMOS technology.
목차
Abstract
Ⅰ. Introduction
Ⅱ. Experimental or Theory
Ⅲ. Discussions
Acknowledgments
References
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