지원사업
학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
커뮤니티
연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 대한전자공학회 JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE Journal of Semiconductor Technology and Science Vol.9 No.4
- 발행연도
- 2009.12
- 수록면
- 209 - 215 (7page)
이용수
초록· 키워드
오류제보하기
Reconfigurable array architecture is recently attracting much attention. It is a flexible hardware architecture, which can dynamically change its configuration to execute various functions while maintainning high performance. However, pursuing flexibility
and performance at the same time leads to complexity, thereby makes the mapping of applications a difficult process. There have been attempts to use compiler or high level synthesis techniques to solve the problem. In this paper, we propose yet another method, which uses libraries for the mapping to provide an abstracttion of the internal structure and at the same time to reduce the development time and efforts through the automated process. We have selected a JPEG decoder as an example to apply the proposed method. As a result, we obtained about 20% less performance compared to manual mapping but development time is dramatically reduced to less than 1%.
and performance at the same time leads to complexity, thereby makes the mapping of applications a difficult process. There have been attempts to use compiler or high level synthesis techniques to solve the problem. In this paper, we propose yet another method, which uses libraries for the mapping to provide an abstracttion of the internal structure and at the same time to reduce the development time and efforts through the automated process. We have selected a JPEG decoder as an example to apply the proposed method. As a result, we obtained about 20% less performance compared to manual mapping but development time is dramatically reduced to less than 1%.
목차
Abstract
Ⅰ. INTRODUCTION
Ⅱ. TARGET ARCHITECTURE
Ⅲ. LIBRARY-BASEDMAPPING
Ⅳ. EXPERIMENTAL RESULTS
Ⅴ. CONCLUSIONS
ACKNOWLEDGMENTS
REFERENCES
참고문헌 (0)
참고문헌 신청함께 읽어보면 좋을 논문
논문 유사도에 따라 DBpia 가 추천하는 논문입니다. 함께 보면 좋을 연관 논문을 확인해보세요!
-
Automatic Mapping of Application to Coarse-Grained Reconfigurable Architecture based on High-Level Synthesis Techniques
대한전자공학회 ISOCC
2008 .11
-
Reconfigurable Co-synthesis System Architecture
ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications
2005 .07
-
ARCHITECTURE OF GENERAL PURPOSE RECONFIGURABLE LOGIC CELL
ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications
2006 .07
-
Design of Reconfigurable Array-Processor based Crypto Chip
대한전자공학회 학술대회
2017 .01
-
Reconfigurable ALU Array Architecture with Conditional Execution
대한전자공학회 ISOCC
2004 .10
-
응용으로부터 재구성형 배열 구조로의 라이브러리 기반 사상
대한전자공학회 학술대회
2009 .05
-
Development of a Run-Time Reconfigurable System using Partially Reconfigurable FPGA
ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications
2005 .07
-
System-level Design Space Exploration and Resource Mapping Strategies for a Reconfigurable Hybrid System
ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications
2002 .07
-
Reconfigurable Periodic Liquid Crystal Defect Array via Application of Electric Field
한국고분자학회 학술대회 연구논문 초록집
2020 .10
-
Automated Architecture Exploration for Low Energy Reconfigurable AGU
대한전자공학회 ISOCC
2011 .11
-
랜덤 연결 구조를 갖는 재구성형 프로세서의 성능 분석
대한전자공학회 학술대회
2010 .11
-
Research Activities on Reconfigurable Systems in Japan
대한전자공학회 ISOCC
2011 .11
-
MEMS 스위치 기반 재구성 고출력 증폭기를 갖는 재구성 능동 배열 안테나 시스템
한국전자파학회논문지
2010 .04
-
Regular Array Cell Library 개발 ( A Development of a Regular Array Cell Library )
대한전자공학회 학술대회
1991 .07
-
Regular Array Cell Library 개발
대한전자공학회 학술대회
1991 .06
-
Development of Optimization Algorithm for Solving Reconfigurable Planning Problem in RMS
한국정밀공학회 학술발표대회 논문집
2017 .12
-
재구성 가능 공작기계 설계를 위한 인터넷 기반 시뮬레이터 개발
대한산업공학회지
2006 .06
-
Fiber remote configuration for an optically reconfigurable gate array
대한전자공학회 ISOCC
2009 .11
-
Reconfigurable Architecture Design for H.264 Motion Estimation and 3D Graphics Rendering
대한전자공학회 ISOCC
2005 .10
-
A Proposal of Programmable Logic Architecture for Reconfigurable Computing
ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications
2002 .07
이 논문의 저자 정보
최근 본 자료
댓글(0)
0
UCI(KEPA) : I410-ECN-0101-2010-569-001611391