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논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- Korean Institute of Information Scientists and Engineers Journal of Electrical Engineering and Information Science Journal of Electrical Engineering and Information Science Vol.3 No.1
- 발행연도
- 1998.2
- 수록면
- 1 - 7 (7page)
이용수
초록· 키워드
오류제보하기
High-Level synthesis of digital circuits calls for automatic translation of a behavioral description to a structural design entity represented in terms of components and connections. One of the critical steps in high-level synthesis is to determine a particular scheduling algorithm that will assign behavioral operations to control states. A new scheduling algorithm called Data Availability Scheduling (DAS) for high-level synthesis is presented. It can determine an appropriate scheduling algorithm and minimize the number of states required using data availability and dependency conditions extracted from the behavioral code, taking into account resource constraint in each control state. The DAS algorithm is efficient because data availability conditions, and conditional and wait statements break the behavioral code into manageable pieces which are analyzed independently. The output is the number of states in a finite state machine and shows better results than those of previous algorithms.
목차
Abstract
Ⅰ. Introduction
Ⅱ. Foundation of the DAS Algorithm
Ⅲ. State Transition Conditions and RBS Variables
Ⅳ. The Data Availability Scheduling Algorithm
Ⅴ. Results and Comparisons
Ⅵ. Conclusions
References
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