A Serial Input/Output Circuit with 8 bit and 16 bit Selection Modes

Yil Suk Yang ,  Jongdae Kim ,  Tae Moon Roh 외 6명

[ETRI] ETRI Journal

2002 .12

Near Optimal Scheduling in Automatic Data Path Synthesis

In Cheol Pa ,  k ,  Chong Min Kyung

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1990 .01

Scheduling Considering Bit Level Delays

Jiwoong Kim ,  Hyunchul Shin

대한전자공학회 ISOCC

2008 .11

상위 수준 합성에서의 스케줄링 향상 기법

정우성 ,  신현철

대한전자공학회 학술대회

2008 .11

새로운 Bit-serial 방식의 곱셈기 및 나눗셈기 아키텍쳐 설계 ( Design of a New Bit-serial Multiplier / Divider Architecture )

옹수환 ,  선우명훈

전자공학회논문지-C

1999 .03

Study of Microprocessors : 2-bit Microcomputer and Bit-Serial Data-Flow Processor

Tomoaki Ando ,  Cong Kha Pham ,  Katsufusa Shono

대한전자공학회 세미나

1990 .01

AN AUTOMATIC HARDWARE SYNTHESIS METHOD FOR PARALLEL PROCESSING CIRCUITS WITH HIGH THROUGHPUT

Yutaka Yokoyama ,  Yoshikazu Miyanaga ,  Koji Tochinai

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1989 .01

A Neural Network Approach to the Scheduling Problem in High Level Synthesis

Tsuyoshi Kawaguchi ,  Tamio Todaka

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1994 .01

Resource-Constrained Scheduling in Automatic Datapath Synthesis

H. W. Pa ,  k ,  K. M. Yi 외 4명

대한전자공학회 기타 간행물

1992 .01

Control of Flexible Link using Mixed H₂/H_∞ and μ-Synthesis Method

Y.W. Choe ,  H.K. Lee ,  J.I. Bae

제어로봇시스템학회 국제학술대회 논문집

2001 .10

Low Power Lattice Wave Digital Bit-Serial Filters

Pontus Ast ,  om ,  Pete 외 3명

ICVC : International Conference on VLSI and CAD

1997 .01

Data Availability Scheduling for Syntheses Beyond Basic Block Scope

Jongsoo Kim

Journal of Electrical Engineering and Information Science

1998 .02

AUTOMATIC CIRCUIT SYNTHESIS FOR MULTILEVEL METAL MOS TECHNOLOGY

I. N. Hajj ,  S. M. Kang ,  P. Gee

ICVC : International Conference on VLSI and CAD

1989 .01

Evaluation of the n Bit-Serial Arithmetic Units in Consideration of Trade-off between Area and Performance

Keisuke Suzuki ,  Munetaka Asao ,  Katsuno 외 4명

ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications

2005 .07

제어구간에 의한 스케듈링 기법

송정영 ,  백남우

공학논문집 : 배재대학교

2002 .01

Automatic Scheduling Algorithm for Personalized Clinical Test

Jung Woo Kim ,  Byung june Choi ,  Kyu ho Noh 외 1명

제어로봇시스템학회 국제학술대회 논문집

2006 .10

A Resource-constrained Scheduling Algorithm for High-level Synthesis

Ho-Jeong Song ,  Jae-Jin Lee ,  In-Jae Hwang 외 1명

ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications

2002 .07

Bit-level Systolic Array for Convolution with Multiplexer-based Bit-serial Multiplier

Jae-Jin Lee ,  Chan-Gun Jeong ,  Gi-Yong Song

ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications

2003 .07

LDPC 부호의 처리율 향상을 위한 개선된 bit-serial 복호 알고리즘

윤성식 ,  안병규 ,  박동규 외 1명

한국통신학회 학술대회논문집

2018 .06

Efficient Bit-Serial Multipliers for a Class of Finite Fields

Soonhak Kwon ,  Heuisu Ryu

한국통신학회 학술대회 및 강연회

2002 .04