A Floorplanning Scheme for VLSI Design

Takashi Kambe ,  Tsuneo Tomita

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1988 .01

Next Generation Floorplanning & Hierarchical Planning

윤원효

대한전자공학회 학술대회

2008 .05

A Decomposition of VLSI Network Based on Fuzzy Clustering Theory

Z. C. Gu ,  Shoichi ,  o Yamada 외 2명

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1991 .01

Techniques for Placement and Floorplanning

Hyun Chul Shin

ICVC : International Conference on VLSI and CAD

1993 .01

Iterative Application of Behavioral Synthesis and Floorplanning for Asynchronous Circuits with Bundled-data Implementation

Naohi ,  o Hamada ,  Hi 외 1명

ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications

2009 .07

On Objective Functions for Fixed-Outline Floorplanning

Lu Wang ,  Xiaolin Zhang ,  Song Chen 외 2명

ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications

2008 .07

A Floorplanning for Blocks with Flexible Aspect Ratio

Y. Y. H. Lam ,  C. C. Jong ,  C. T. Lee 외 1명

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1993 .01

A Floorplanning Algorithm Using Force-Directed Block Shaping

Sang Gil Choi ,  Chong Min Kyung

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1991 .01

A NOVEL VLSI ARCHITECTURE FOR CLUSTERING ANALYSIS

Mao Fu Lai ,  Chau ,  Heh Hsieh

대한전자공학회 기타 간행물

1996 .01

A New Algorithm on VLSI-Block Placement Using Fuzzy Theory

Z. C. Gu ,  Shunichi Nakayama ,  Shoichi 외 4명

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1990 .01

The Application of Relaxation Methods for the Hierarchical Simulation of VLSI Circuits

Timothy N. T ,  ick

대한전자공학회 워크샵

1985 .01

VLSI의 설계검증을 위한 계층적 회로 추출 알고리듬 ( Hierarchical Circuit Extract Algorithm for VLSI Design Verification )

임재윤 ,  임인칠

전자공학회논문지

1988 .08

VLSI Design of HAS-160 Algorithm

Ju Dai Hyun ,  Byeong Yoon Choi

ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications

2003 .07

A GA-based Floorplanning method for Topological Constraint

Masaya Yoshikawa ,  Hidekazu Te ,  ai

제어로봇시스템학회 국제학술대회 논문집

2005 .06

SIGNAL INTEGRITY FOR HIGH SPEED VLSI CIRCUITS

어영선

대한전자공학회 토론회

1995 .01

SIGNAL INTEGRITY FOR HIGH SPEED VLSI CIRCUITS

YUNGSEON EO

대한전자공학회 학술대회

1995 .07

Fuzzy system construction based on Genetic Algorithms and fuzzy clustering

Keun-Chang Kwak ,  Seoung-Suk Kim ,  Jeong-Woong Ryu 외 1명

제어로봇시스템학회 국제학술대회 논문집

2002 .10

CubicPlan : Logic 설계자를 위한 계층적 Floorplanning 시스템 ( CubicPlan : A Hierarchical Floorplanning System for Logic Designers )

장명수 ,  진훈상 ,  이진용 외 2명

대한전자공학회 토론회

1997 .01

CubicPlan : Logic 설계자를 위한 계층적 Floorplanning 시스템

장명수 ,  진훈상 ,  이진용 외 2명

대한전자공학회 학술대회

1997 .07

Empirical Comparisons of Clustering Algorithms using Silhouette Information

Sunghae Jun ,  Seung-Joo Lee

INTERNATIONAL JOURNAL of FUZZY LOGIC and INTELLIGENT SYSTEMS

2010 .03