In this thesis, novel bump structures have been proposed, designed, and fabricated for reliability enhancement and cost-effective manufacturing of Chip-On-Chip(CoC) flip-chip packages. For five kinds of bumping structures(conventional bumps of Cu pillar/SnAg and Cu pillar/Ni/SnAg, and novel bumps enclosed by Polybenzoxazole(PBO) of Cu pillar/SnAg, Cu pillar/Ni/SnAg and SnAg) on two kinds of evaluation substrates with/without 2nd Polyimide(PI2) layer option, shear tests have been performed under the conditions of 100 μm/sec speed and 15 μm height of a shear tip, and the test results have shown that better shear mode and shear strength could be obtained in the novel bumps, compared with in conventional bumps.
A batch Chip-On-Wafer process of flip-chip bonding has been used for the process evaluation for which 10 kinds of CoC flip-chip bump interconnection structures are fabricated. As a result, the substrate with the PI2 layer option shows better alignment accuracy in the process, which means it can be used for the cost-effective bach flip chip CoW process.
And electromagnetic field simulation has been done using CST MICROWAVE STUDIO® for CPW transmission line of 50 Ω characteristic impedance which is used for microwave measurement and performance evaluation of the fabricated samples. The process evaluation results of S1 substrate using PI2 as a passivation material also show that the S1 substrate can be used for the cost-effective bath flip-chip CoW process and, in terms of reliability, the novel bumps on the wafer with PI2 layers have better performance for the batch flip-chip process. The insertion loss of the novel bumps is measured to be 0.11~0.14 dB up to 18 GHz, which is similar or slightly better than 0.13~0.17 dB of the conventional bump structures in this study. Conclusively, we find that the proposed bump structures can be utilized in various microwave packages requiring high integration density, strict reliability and cost effectiveness.
The measured DUTs and bumps have been modeled to express the bump joint interconnection with lumped elements and the values of the lumped elements are extracted. The modeling result shows 107 pH and 33.1 mΩ for series LB and RB of the signal bump, and 27 fF and 441 MΩ for shunt CC and RC accounting for the loss of the dielectric materials between bumps. The developed bump model has almost the same insertion loss of 0.13 dB at 18 GHz when it is compared to de-embedded S-parameters of the S1CoC bump interconnection. Although it has some limitation, to some extent, the extracted model can be used in other simulation works for similar process development.