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논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 발행연도
- 2024.8
- 수록면
- 708 - 715 (8page)
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초록· 키워드
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We propose a 10-GHz 2 2 phased-array radio frequency (RF) receiver with an 8-bit linear phase and 15-dB gain control range using 65-nm complementary metal-oxide-semiconductor technology. An 8 X 8 phased-array receiver module is implemented using 16 2 X 2 RF phased-array integrated circuits. The receiver chip has four single-to-differential low-noise amplifier and gaincontrolled phase-shifter (GCPS) channels, four channel combiners, and a 50-Ω driver. Using a novel complementary bias technique in a phase-shifting core circuit and an equivalent resistance-controlled resistor-inductor-capacitor load, the GCPS based on vector-sum structure increases the phase resolution with weighting-factor controllability, enabling the vector-sum phase-shifting circuit to require a low current and small area due to its small 1.2-V supply. The 2 X 2 phased-array RF receiver chip has a power gain of 21 dB per channel and a 5.7-dB maximum single-channel noise-figure gain. The chip shows 8-bit phase states with a 2.39 degree root mean-square (RMS) phase error and a 0.4-dB RMS gain error with a 15-dB gain control range for a 2.5 degree RMS phaseerror over the 10 to 10.5-GHz band.
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