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논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 한국전자파학회JEES Journal of Electromagnetic Engineering And Science Journal of The Korea Electromagnetic Engineering Society Vol.9 No.1
- 발행연도
- 2009.3
- 수록면
- 25 - 31 (7page)
이용수
초록· 키워드
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This paper describes CMOS VCO circuit design procedures and techniques for multi-band/multi-standard RF transceivers. The proposed techniques enable a 4 ㎓ CMOS VCO to satisfy all requirements for Quad-band GSM/EDGE and WCDMA standards by achieving a good trade-off among important specifications, phase noise, power consumption, modulation performance, and chip area efficiency. To meet the very stringent GSM T/Rx phase noise and wide frequency range specifications, the VCO utilizes bond-wire inductors with high-quality factor, an 8-bit coarse tune capbank for low VCO gain(30～50 ㎒/V) and an on-chip 2nd harmonic noise filter. The proposed VCO is implemented in 0.13 ㎛ CMOS technology. The measured tuning range is about 34 %(3.17 to 4.49 ㎓). The VCO exhibits a phase noise of －123 ㏈c/㎐ at 400 ㎑ offset and －145 dBc/㎐ at 3 ㎒ offset from a 900 ㎒ carrier after LO chain. The calculated figure of merit(FOM) is －183.5 ㏈c/㎐ at 3 ㎒ offset. This fully integrated VCO occupies 0.45×0.9 ㎟.
목차
Abstract
Ⅰ. Introduction
Ⅱ. VCO Design Procedures
Ⅲ. Measurement Results
Ⅳ. Conclusions
References
참고문헌 (14)
참고문헌 신청
1. [학술대회논문] - J. J. Rael / 2000 / Physical processes of phase noise in differential LC oscillators / Custom Integrated Circuit Conf : 569 ~ 572
2. [학술지(정기간행물)] - E. Hegazi / 2001 / A filtering technique to lower LC oscillator phase noise / Solid-State Circuits 36 : 717 ~ 724
3. [학술지(정기간행물)] - S. Ryu / 2005 / Phase noise optimization of CMOS VCO through harmonic tuning / Circuits Symp : 403 ~ 406
4. [학술지(정기간행물)] - K. Lee / 2008 / A 0.13-um CMOS Σ-Δ frequency synthesizer with an area optimizing LPF, fast AFC time, and a wideband VCO for WCDMA/GSM/ GPRS/EDGE applications / Circuits Symp : 299 ~ 302
5. [학술지(정기간행물)] - A. Koukab / 2006 / A GSM- GPRS/UMTS FDD-TDD/WLAN 802.11a-b-g multi- standard carrier generation system / Solid- State Circuits 41 : 1513 ~ 1521
2. [학술지(정기간행물)] - E. Hegazi / 2001 / A filtering technique to lower LC oscillator phase noise / Solid-State Circuits 36 : 717 ~ 724
3. [학술지(정기간행물)] - S. Ryu / 2005 / Phase noise optimization of CMOS VCO through harmonic tuning / Circuits Symp : 403 ~ 406
4. [학술지(정기간행물)] - K. Lee / 2008 / A 0.13-um CMOS Σ-Δ frequency synthesizer with an area optimizing LPF, fast AFC time, and a wideband VCO for WCDMA/GSM/ GPRS/EDGE applications / Circuits Symp : 299 ~ 302
5. [학술지(정기간행물)] - A. Koukab / 2006 / A GSM- GPRS/UMTS FDD-TDD/WLAN 802.11a-b-g multi- standard carrier generation system / Solid- State Circuits 41 : 1513 ~ 1521
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