지원사업
학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
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연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 대한전자공학회 JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE Journal of Semiconductor Technology and Science Vol.21 No.5
- 발행연도
- 2021.10
- 수록면
- 322 - 333 (12page)
- DOI
- 10.5573/JSTS.2021.21.5.322
이용수
초록· 키워드
오류제보하기
In this paper, a current-mode neural stimulator integrated circuit (IC) using novel active charge balancing technique is presented. The charge balancing technique proposed in this work is based on chopped pulse waveform, where the number of chopped pulses generated in the anodic phase is controlled accurately in order to limit the amount of residual potential at the electrode. In addition, a quick automatic electrode shorting process follows the active charge balancing phase to further discharge to a negligible residual voltage level in every stimulation cycle, ensuring a safe and long-term operation. Both symmetric and asymmetric stimulation pulse waveforms can be selected to provide wide flexibility for various stimulation environment. The stimulator IC designed using 0.18-μm standard CMOS process achieves 12.3 V of voltage compliance and can deliver 1 mA of maximum stimulation current with 5-bit resolution and high linearity. All circuit functions are integrated on-chip without external components, and the fabricated chip consumes only 0.095 mm² of active die area.
목차
Abstract
I. INTRODUCTION
II. STIMULATION WAVEFORM
III. CONVENTIONAL CHARGE BALANCING TECHNIQUES
IV. CIRCUIT DESCRIPTION
V. MEASUREMENT RESULTS
VI. CONCLUSIONS
REFERENCES
참고문헌 (23)
참고문헌 신청
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H.-G. Rhew, J. Jeong, J.A. Fredenburg, S. Dodani, P.G. Patil, and M. P. Flynn, A fully self-contained logarithmic closed-loop deep brain stimulation SoC with wireless telemetry and wireless power management, IEEE J. Solid-State Circuits 49 (2014) 213.
X. Liu, M. Zhang, A. G. Richardson, T. H. Lucas, and J. Van der Spiegel, Design of a closed-loop, bidirectional brain machine interface system with energy efficient neural feature extraction and PID control, IEEE Trans. Biomed. Circuits Syst. 11 (2017) 729.
H. Chun, Y. Yang, and T. Lehmann, “Safety ensuring retinal prosthesis with precise charge balance and low power consumption,” IEEE Trans. Biomed. Circuits Syst., vol. 8, no. 1, pp. 108-118, Feb. 2014
M. Ortmanns, A. Rocke, M. Gehrke, and H.-J. Tiedtke, “A 232-channel epiretinal stimulator ASIC,” IEEE J. Solid-State Circuits, vol. 42, no. 12, pp. 2946-2959, Dec. 2007.
H.-G. Rhew, J. Jeong, J.A. Fredenburg, S. Dodani, P.G. Patil, and M. P. Flynn, A fully self-contained logarithmic closed-loop deep brain stimulation SoC with wireless telemetry and wireless power management, IEEE J. Solid-State Circuits 49 (2014) 213.
X. Liu, M. Zhang, A. G. Richardson, T. H. Lucas, and J. Van der Spiegel, Design of a closed-loop, bidirectional brain machine interface system with energy efficient neural feature extraction and PID control, IEEE Trans. Biomed. Circuits Syst. 11 (2017) 729.
H. Chun, Y. Yang, and T. Lehmann, “Safety ensuring retinal prosthesis with precise charge balance and low power consumption,” IEEE Trans. Biomed. Circuits Syst., vol. 8, no. 1, pp. 108-118, Feb. 2014
M. Ortmanns, A. Rocke, M. Gehrke, and H.-J. Tiedtke, “A 232-channel epiretinal stimulator ASIC,” IEEE J. Solid-State Circuits, vol. 42, no. 12, pp. 2946-2959, Dec. 2007.
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