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논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- Korean Institute of Information Scientists and Engineers Journal of Computing Science and Engineering Journal of Computing Science and Engineering Vol.14 No.3
- 발행연도
- 2020.9
- 수록면
- 102 - 111 (10page)
- DOI
- 10.5626/JCSE.2020.14.3.102
이용수
초록· 키워드
오류제보하기
The execution units of GPUs (graphics processing units) have been observed to produce many idle cycles that could be a tremendous waste of energy consumption which meanwhile provides a hint to build a more energy-efficient system to operate GPUs if idle cycles can be appropriately taken care of. However, power-gating without foresight can be dangerous since inaccurate decisions on power-gating will introduce unaffordable overhead on both energy consumption and performance. In this paper, we examine the length of execution units’ idle cycles for several representative GPGPU applications and evaluate the distribution of the idleness durations. We then propose the energy-saving strategies with focus on discovering potential execution units’ power-gating opportunities. The idle durations are recorded in the runtime for various computing units in streaming multiprocessors (SMs) including integer units and floating units in streaming processors (SPs) and special function units (SFUs). By analyzing the observed idleness, we propose to enhance the energy efficiency through two execution units’ power-gating policies, the immediate power-gating (IPG) and idle detect power-gating (ID-PG). Furthermore, we examine the policies with various parameter settings to offer insights on possible gains and losses of the power-gating techniques. Besides, by noticing that integer units are the most popular computing units for many applications, we introduce the power-aware SP(s) to increase the throughput of integer instructions. It was observed that the power-aware SP can provide performance enhancement as well as the leakage energy reduction for several applications. The experimental results show that both the policies can result in satisfactory leakage energy saving on execution units. The IPG can reduce the execution unit’s leakage energy by 84.3% when the break-even time is set to 5 cycles. Even if the break-even time goes up to 20 cycles, the ID-PG can save 67.1% of the total execution units’ leakage energy. Moreover, involving power-aware SP(s) can improve the performance by up to 14.4% and 2.7% on average.
목차
Abstract
I. INTRODUCTION
II. BACKGROUND
III. RELATED WORK
IV. MOTIVATION
V. POWER-GATING STRATEGIES
VI. METHODOLOGY & EXPERIMENTAL RESULTS
VII. CONCLUSION
REFERENCES
참고문헌 (24)
참고문헌 신청
K. Fatahalian and M. Houston, “A closer look at GPUs,” Communications of the ACM, vol. 51, no. 10, pp. 50-57, 2008.
S. Che, M. Boyer, J. Meng, D. Tarjan, J. W. Sheaffer, and K. Skadron, “A performance study of general-purpose applications on graphics processors using CUDA,” Journal of Parallel and Distributed Computing, vol. 68, no. 10, pp. 1370-1380, 2008.
P. Karnick, “GPGPU: general purpose computing on graphics hardware,” 2006; http://citeseerx.ist.psu.edu/viewdoc/download;jsessionid=FE53DC39B11BC62568A5EB6C45B8AA7A?doi=10.1.1.184.5653&rep=rep1&type=pdf.
NVIDIA, “NVIDIA CUDA compute united device architecture: programming guide,” 2008; http://developer.download.nvidia.com/compute/cuda/2_0/docs/NVIDIA_CUDA_Programming_Guide_2.0.pdf.
A. Munshi, “The openCL specification,” in Proceedings of 2009 IEEE Hot Chips 21 Symposium (HCS), 2009, Stanford, CA, pp. 1-314.
S. Che, M. Boyer, J. Meng, D. Tarjan, J. W. Sheaffer, and K. Skadron, “A performance study of general-purpose applications on graphics processors using CUDA,” Journal of Parallel and Distributed Computing, vol. 68, no. 10, pp. 1370-1380, 2008.
P. Karnick, “GPGPU: general purpose computing on graphics hardware,” 2006; http://citeseerx.ist.psu.edu/viewdoc/download;jsessionid=FE53DC39B11BC62568A5EB6C45B8AA7A?doi=10.1.1.184.5653&rep=rep1&type=pdf.
NVIDIA, “NVIDIA CUDA compute united device architecture: programming guide,” 2008; http://developer.download.nvidia.com/compute/cuda/2_0/docs/NVIDIA_CUDA_Programming_Guide_2.0.pdf.
A. Munshi, “The openCL specification,” in Proceedings of 2009 IEEE Hot Chips 21 Symposium (HCS), 2009, Stanford, CA, pp. 1-314.
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UCI(KEPA) : I410-ECN-0101-2020-569-001305231