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논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 대한전자공학회 JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE Journal of Semiconductor Technology and Science Vol.18 No.2
- 발행연도
- 2018.4
- 수록면
- 172 - 179 (8page)
- DOI
- 10.5573/JSTS.2018.18.2.172
이용수
초록· 키워드
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In this work, processing and characterization of ultra-thin poly-Si are performed for memory and logic applications. Ultra-thin poly-Si layers with different thicknesses were prepared on the deposited oxide by low-pressure chemical vapor deposition (LPCVD). Deposited poly-Si were doped through POCl<SUB>3</SUB> gas-phase doping at 900 °C, in which 10-nm thickness was reduced. Afterward, postdeposition annealing (PDA) under different conditions were performed. Thicknesses of deposited poly-Si films were 20, 30, and 50 nm. The following PDA improves the crystallinity, which has been confirmed by high-resolution transmission electron
microscopy (HR-TEM) with fast Fourier transform (FFT) imaging and sheet resistivity lowering. Also, superior crystalline film is observed in the thinner film and the bi-directionally arranged domains are obtained from the 40-nm poly-Si film.
microscopy (HR-TEM) with fast Fourier transform (FFT) imaging and sheet resistivity lowering. Also, superior crystalline film is observed in the thinner film and the bi-directionally arranged domains are obtained from the 40-nm poly-Si film.
목차
Abstract
I. INTRODUCTION
II. EXPERIMENTAL
III. RESULTS AND DISCUSSION
IV. CONCLUSION
REFERENCES
참고문헌 (30)
참고문헌 신청
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