지원사업
학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
커뮤니티
연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 대한전자공학회 JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE Journal of Semiconductor Technology and Science Vol.13 No.5
- 발행연도
- 2013.10
- 수록면
- 430 - 442 (13page)
이용수
초록· 키워드
오류제보하기
This paper presents a fast multi-reference frame integer motion estimator for H.264/AVC. The proposed system uses the previously proposed fast multi-reference frame algorithm. The previously proposed algorithm executes a full search area motion estimation in reference frames 0 and 1. After that, the search areas of motion estimation in reference frames 2, 3 and 4 are minimized by a linear relationship between the motion vector and the distances from the current frame to the reference frames. For hardware implementation, the modified algorithm optimizes the search area, reduces the overlapping search area and modifies a division equation. Because the search area is reduced, the amount of computation is reduced by 58.7%. In experimental results, the modified algorithm shows an increase of bit-rate in 0.36% when compared with the five reference frame standard. The pipeline structure and the memory controller are also adopted for real-time video encoding. The proposed system is implemented using 0.13 um CMOS technology, and the gate count is 1089K with 6.50 KB of internal SRAM. It can encode a Full HD video (1920x1080P@30Hz) in real-time at a 135 MHz clock speed with 5 reference frames.
목차
Abstract
I. INTRODUCTION
II. MULTI-REFERENCE FRAME MOTION ESTIMATION AND PREVIOUS FAST ALGORITHMS
III. ALGORITHM MODIFICATION
IV. SIMULATION RESULTS
V. ARCHITECTURE DESIGN
VI. SYNTHESIS RESULTS
REFERENCES
참고문헌 (19)
참고문헌 신청
1. [기타자료] - J. V. Team / / Draft ITU-T Recommendation and Final Draft International Standard of Joint Video Specification. ITU-T Rec. H.264 and ISO/IEC 14496-10 AVC
2. [학술지(정기간행물)] - S. H. Lee / 2006 / A Pipelined Hardware Architecture of an H.264 Deblocking Filter with an Efficient Data Distribution / Journal of Semiconductor Technology and Science 6 (4) : 227 ~ 233
3. [학술지(정기간행물)] - L. Yang / 2005 / An effective variable block - size early termination algorithm for H.264 video coding / IEEE Trans. on Circuits and Systems for Video Technology 15 (6) : 784 ~ 788
4. [학술지(정기간행물)] - Naoyuki Hirai / 2010 / A Novel Spiral-Type Motion Estimation Architecture for H.264/AVC / JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE 10 (1) : 37 ~ 44
5. [학술지(정기간행물)] - W. Lee / 2007 / High speed intra prediction scheme for H.264/AVC / IEEE Trans. Consumer Electronics 53 (4) : 1577 ~ 1582
2. [학술지(정기간행물)] - S. H. Lee / 2006 / A Pipelined Hardware Architecture of an H.264 Deblocking Filter with an Efficient Data Distribution / Journal of Semiconductor Technology and Science 6 (4) : 227 ~ 233
3. [학술지(정기간행물)] - L. Yang / 2005 / An effective variable block - size early termination algorithm for H.264 video coding / IEEE Trans. on Circuits and Systems for Video Technology 15 (6) : 784 ~ 788
4. [학술지(정기간행물)] - Naoyuki Hirai / 2010 / A Novel Spiral-Type Motion Estimation Architecture for H.264/AVC / JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE 10 (1) : 37 ~ 44
5. [학술지(정기간행물)] - W. Lee / 2007 / High speed intra prediction scheme for H.264/AVC / IEEE Trans. Consumer Electronics 53 (4) : 1577 ~ 1582
이 논문의 저자 정보
이 논문과 함께 이용한 논문
최근 본 자료
댓글(0)
0
UCI(KEPA) : I410-ECN-0101-2014-560-002740914