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논문 기본 정보
- 자료유형
- 학술대회자료
- 저자정보
- 발행연도
- 2010.11
- 수록면
- 43 - 46 (4page)
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In this paper, multi-channel neural signal recorder with tunable gain filter is proposed. It is characterized by small-gm OTA for lowering cutoff frequency. The prototype of the proposed system is designed in TSMC 0.18 μm CMOS technology. Filter consists of high pass filter of delta-gm structure OTA with 201.06 pA/V transconductance and tunable gain Gm-C low pass filter. Single slope ADC is used to convert filter output into dig-ital bits. The tunable gain range, bandwidth, CMRR and input referred noise of resulting filter are 20 ? 68 dB, 20 Hz - 10 kHz, 185.7 dB at 5 kHz and 319 nV/√Hz, respectively. Single slope ADC has 40 kS/s sampling rate and 1.2 V input range. Total power consumption per channel is 59 μW.
목차
Abstract
Ⅰ. INTRODUCTION
Ⅱ. PROPOSED SYSTEM ARCHITECTURE
Ⅲ. SIMULATION RESULT
Ⅳ. CONCLUSION
ACKNOWLEDGMENT
REFERENCES
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UCI(KEPA) : I410-ECN-0101-2013-569-001488894