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논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- Korean Institute of Information Scientists and Engineers Journal of Electrical Engineering and Information Science Journal of Electrical Engineering and Information Science Vol.4 No.5
- 발행연도
- 1999.10
- 수록면
- 633 - 639 (7page)
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초록· 키워드
오류제보하기
This paper presents the work on developing a two-stage broad-band power amplifier using monolithic microwave integrated circuits(MMIC) based on 0.15 um AlGaAs/InGaAs/GaAs pseudomorphic high electron mobility transistor (PHEMT). The circuit is applicable to the up-link power amplifier over 24.25 GHz to 24.75 GHz and down-link driver amplifier over 26.7 GHz to 27.5 GHz for two-way local multipoint distribution services (LMDS).
The PHEMTs with gate width of 200 mm and 400 mm, were used to produce a 10 dBm amplification in the first stage amplifier and a 8.5 dBm amplification in the second stage. Resistive feedback from the drain to gate of the PHEMT was used for broad band match and stable amplification. The amplifier has a small signal gain of 18.6 dB at 24.5 GHz and 16.7dB at 27.1GHz. It has been achieved the output powers of 19.8 dBm with PAE of 19.8% at 24.5 GHz and 18.8 dBm at 27.1 GHz for a 4-V supply operation. The design, fabrication, measurement and analysis process of MMIC Ka-band broa-band amplifier and driver amplifier are described in this paper. The dimensions of the fabricated chip are 1.44mm×2.45mm×0.1mm.
The PHEMTs with gate width of 200 mm and 400 mm, were used to produce a 10 dBm amplification in the first stage amplifier and a 8.5 dBm amplification in the second stage. Resistive feedback from the drain to gate of the PHEMT was used for broad band match and stable amplification. The amplifier has a small signal gain of 18.6 dB at 24.5 GHz and 16.7dB at 27.1GHz. It has been achieved the output powers of 19.8 dBm with PAE of 19.8% at 24.5 GHz and 18.8 dBm at 27.1 GHz for a 4-V supply operation. The design, fabrication, measurement and analysis process of MMIC Ka-band broa-band amplifier and driver amplifier are described in this paper. The dimensions of the fabricated chip are 1.44mm×2.45mm×0.1mm.
목차
Abstract
Ⅰ. Introduction
Ⅱ. Design Approach
Ⅲ. Fabrication and Measured Result
Ⅳ. Conclusion
References
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