지원사업
학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
커뮤니티
연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 자료유형
- 학술대회자료
- 저자정보
- 발행연도
- 2011.11
- 수록면
- 13 - 16 (4page)
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초록· 키워드
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This paper describes design and analysis of two SiGe BiCMOS power amplifiers for 60GHz ISM band applications. The presented two-stage and three-stage power amplifier employ single-ended topology with transistors in common-emitter configuration, except that the three-stage power amplifier uses a cascade structure in the input stage for better input/output isolation. Drawn 37.8mw from 1.8V supply, the two-stage power amplifier is able to deliver 7.2dBm output power, 13.5dB power gain and 11.9% PAE at its 1dB compression point. A saturated power of 8.6dBm can be achieved. With a power consumption of 46.8mW from 1.8V supply, the three-stage power amplifier offers a power gain of 22.5dB, 5.5dBm output power and 7.6% PAE at its 1dB compression point. The two-stage and three-stage power amplifier occupy a silicon area of 880 x 580 m2 and 1180 x 580 m2, respectively. The simulation results show that the two designs can be fully adopted in 60GHz ISM band applications. The presented power amplifiers have a fT/fmax = 200/200 GHz and a break-down voltage BVCEO of 1.9V, based on Tower Jazz Semiconductor’s 0.18m SiGe BiCMOS process.
목차
Abstract
I. INTRODUCTION
II. PROPOSED TWO-STAGE AND THREE-STAGE POWER AMPLIFIERS
III. SIMULATION RESULTS
IV. CONCLUSIONS
ACKNOWLEDGMENT
REFERENCES
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UCI(KEPA) : I410-ECN-0101-2013-569-001474272