메뉴 건너뛰기
.. 내서재 .. 알림
소속 기관/학교 인증
인증하면 논문, 학술자료 등을  무료로 열람할 수 있어요.
한국대학교, 누리자동차, 시립도서관 등 나의 기관을 확인해보세요
(국내 대학 90% 이상 구독 중)
로그인 회원가입 고객센터 ENG
주제분류

추천
검색

논문 기본 정보

자료유형
학위논문
저자정보

박창범 (서경대학교, 서경대학교 대학원)

발행연도
2018
저작권
서경대학교 논문은 저작권에 의해 보호받습니다.

이용수6

표지
AI에게 요청하기
추천
검색

이 논문의 연구 히스토리 (2)

초록· 키워드

오류제보하기
본 논문에서는 BJT(bipolar junction transistor)와 저항을 사용하지 않고 전원전압 1V이하에서 동작하는 초저전력 CMOS 기준 전압 발생기를 설계한다. 제안한 기준 전압 발생기는 일정한 전류를 공급하기 위한 기준 전류원 회로, 기준 전압을 생성하기 위한 PTAT(proportional to absolute temperature) 및 CTAT(complementary to absolute temperature)전압 발생기를 포함한 간단한 구조로 제작된다. CTAT 전압은 MOS 소자의 문턱 전압(Vth)를 이용하여 생성하였고, PTAT 전압은 MOS 소자의 사이즈 비를 이용하여 생성한다. BJT를 대체하여 MOS 소자를 사용했을 때의 단점인 공정변화에 따른 CTAT 전압의 변화를 줄이기 위해 바디 바이어스(Body bias)를 적용한 가중 ΔVgs(Weighted ΔVgs)구조를 제안하여 공정 변화에 따른 출력 기준 전압의 변화를 크게 개선한다. 또한 제안된 기준 전압 발생기는 Sub-threshold(=weak inversion)영역에서 동작시켜 전력 소모를 최소화 하여, 0.18 μm Deep N-Well 공정을 사용하여 제작된다. 제작된 기준 전압 발생기는 온도범위 ?40°∼ 80°에서 55ppm/°C의 온도변화를 가진다. 전원전압제거 비(PSRR)는 100Hz에서 ?44dB를 달성하였고, 전원전압 0.8V에서 38nW의 전력소모를 갖는다. 측정된 출력 기준 전압은 435mV이고, 수동소자 및 BJT를 사용하지 않고 MOS 소자로만 구성하였기 때문에 일반적인 디지털 공정에서도 적용이 가능하며, 회로의 면적은 0.0073mm2로 매우 적은 면적을 차지한다.

목차

제 1 장 서 론 ························································································· 1
제 2 장 기준 전압 발생기의 개요 ····························································· 3
2.1 고전적인 기준 전압 발생기 ···························································· 4
2.1.1 동작 원리 ··············································································· 6
2.1.2 고전적인 기준 전압 발생기의 문제점 ········································ 7
2.2 BJT를 사용한 기존의 저전력 1V이하 기준 전압 발생기 ····················· 9
2.2.1 동작 원리 ··············································································· 9
2.2.2 BJT를 사용한 기존의 저전력 1V이하 기준전압 발생기의 문제점 · 12
2.3 BJT가 제거된 기존의 저전력 CMOS 기준 전압 발생기 ····················· 13
2.3.1 동작 원리 ·············································································· 15
2.3.2 BJT가 제거된 기존의 저전력 CMOS 기준 전압 발생기의 문제점 · 16
2.4 요약 ···························································································· 17
제 3 장 초저전력 1V이하 CMOS 기준 전압 발생기
개선 방안 ······················································································ 19
3.1 CTAT 전압 생성 ··········································································· 20
3.2 PTAT 전압 생성 ············································································ 23
3.3 출력 기준 전압 생성 ······································································· 23
제 4 장 모의실험 및 측정결과
4.1 초저전력 1V이하 CMOS 기준 전압 발생기 모의실험 결과 ················ 25
4.2 레이아웃 ······················································································ 28
4.3 초저전력 1V이하 CMOS 기준 전압 발생기 측정 결과 ······················ 29
4.4 성능 요약 및 비교 ········································································· 32
제 5 장 결 론 ························································································· 33
참 고 문 헌 ···························································································· 34
영 문 초 록 ···························································································· 36

최근 본 자료

전체보기

댓글(0)

0