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학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
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논문 기본 정보
- 자료유형
- 학위논문
- 저자정보
- 지도교수
- 천지민
- 발행연도
- 2018
- 저작권
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This thesis proposed an incremental delta-sigma analog to digital converter (ADC) to measure the current flowing through a secondary cell battery in a battery management system (BMS). The ADC using instrumentation, measurement and sensor applications requires high absolute resolution and linearity, low offset and noise. The delta?sigma modulator (DSM) is possible to obtain high resolution at low power, low cost in the low frequency bandwidth by oversampling and noise shaping. The proposed incremental ADC consists of the DSM and the decimation filter. The proposed DSM, which has an architecture of second order cascade of integrator feedforward (CIFF), consists of switched capacitor of integrators (SC integrator), a non-overlapped clock generator, and a single-bit comparator. The amplifier of SC integrator was used a folded cascode operational transconductance amplifier (OTA). The first stage OTA with a large load capacitance is added a slew rate compensation circuit. The wide-swing bias circuit is used for a wide operating range of OTA. A single-bit comparator is used the dynamic comparator for low power. The bottom-plate sampling is performed to reduce the influence of charge injection. In order to process the second order DSM output, the second order decimation filter which is composed a ripple counter and an accumulator is designed to output 20 bits.
The proposed second order incremental delta-sigma ADC which is designed 760900 using a 350-nm CMOS 2-poly 4-metal process with 1.8-V supply voltage. The pre-simulation achieves the signal to noise distortion ratio (SNDR) is 95.46 dB, and the effective number of bits (ENOB) is 15.56 bits for a 5-kHz signal band at 4-MHz sampling frequency.
The proposed second order incremental delta-sigma ADC which is designed 760900 using a 350-nm CMOS 2-poly 4-metal process with 1.8-V supply voltage. The pre-simulation achieves the signal to noise distortion ratio (SNDR) is 95.46 dB, and the effective number of bits (ENOB) is 15.56 bits for a 5-kHz signal band at 4-MHz sampling frequency.
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