With the continuous development of complementary metal oxide semiconductor (CMOS) device technology, the semiconductor industry has achieved remarkable growth. Notwithstanding the considerable advancement of CMOS device technology, the semiconductor industry is currently facing a power density issue, known as the “Boltzmann Tyranny,” which academia and industry are carefully finding solutions to break through. One of the solutions, the negative capacitance field effect transistor (NCFET), has been extensively studied by the electron device community since 2008; however, there are not sufficient experimental results to advance this technology. Therefore, this thesis has primarily focused on experimentally investigating the NCFET. First, the effects of negative capacitance in the MOS transistor were investigated by connecting a ferroelectric capacitor to the gate of the MOS transistor. During the measurement, the ferroelectric negative capacitance component leads to an internal voltage amplification in the MOS transistor, which enables the MOS transistor to have a subhthreshold slope (SS) of 60 mV/decade at room temperature; SS was improved from 92 mV/decade to 18 mV/decade at 300 K. Moreover, the hysteresis characteristic of the NCFET was experimentally investigated, because a non-hysteretic operation is a prerequisite for the transistor to be used in the logic circuit. With the optimized condition, the nearly non-hysteresis switching was demonstrated with an average SS of 48 mV/decade. It is also confirmed that there is trade-off between the SS and the hysteresis in the current characteristic. Finally, to understand the temperature characteristic of the NCFET, the device was investigated under different temperature conditions. Although some degradation of SS was observed with the increase in temperature, NCFET still maintained SS < 60 mV/decade (i.e., 24 mV/decade) at 400 K. These experimental results can open a new avenue of research in CMOS device technology, suppressing the ever-increasing power density.