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논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 발행연도
- 2012.1
- 수록면
- 29 - 33 (5page)
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초록· 키워드
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The demand for 3D wafer level integration has been increasing significantly. Although many technical challenges of wafer stacking are still remaining, wafer stacking is a key technology for 3D integration due to a high volume manufacturing, smaller package size, low cost, and no need for known good die. Among several new process techniques Cu-to-Cu wafer bonding is the key process to be optimized for the high density and high performance IC manufacturing.
In this study two main challenges for Cu-to-Cu wafer bonding were evaluated: misalignment and bond quality of bonded wafers. It is demonstrated that the misalignment in a bonded wafer was mainly due to a physical movement of spacer removal step and the bond quality was significantly dependent on Cu bump dishing and oxide erosion by Cu CMP.
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참고문헌 (14)
참고문헌 신청
C. S. Tan / 2005 / Multi-layer silicon layer stacking based on copper wafer bonding / Electrochemical and solidstate letters 8 (6) : 147 ~
H. W. Zeij / 2009 / Alignment and Overlay Characterization for 3D Integration and Advanced Packaging / Proc. 11th Electronics Packaging Technology Conference (EPTC) : 447 ~
J-W Kim / 2012 / Effect of HF/ H2SO4 Pretreatment on Interfacial Adhesion Energy of Cu- Cu Direct Bonds / Microelectronic Engineering 89 : 42 ~
J. Balachandran / 2006 / Wafer-Level Package Interconnect Options / VLSI 14 (6) : 654 ~
L. Peng / 2010 / Fabrication and characterization of bump-less Cu-Cu bonding by wafer-on-wafer stacking for 3D IC / Proc. 12th Electronics Packaging Technology Conference(EPTC) : 7
H. W. Zeij / 2009 / Alignment and Overlay Characterization for 3D Integration and Advanced Packaging / Proc. 11th Electronics Packaging Technology Conference (EPTC) : 447 ~
J-W Kim / 2012 / Effect of HF/ H2SO4 Pretreatment on Interfacial Adhesion Energy of Cu- Cu Direct Bonds / Microelectronic Engineering 89 : 42 ~
J. Balachandran / 2006 / Wafer-Level Package Interconnect Options / VLSI 14 (6) : 654 ~
L. Peng / 2010 / Fabrication and characterization of bump-less Cu-Cu bonding by wafer-on-wafer stacking for 3D IC / Proc. 12th Electronics Packaging Technology Conference(EPTC) : 7
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