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논문 기본 정보

자료유형
학술저널
저자정보
Fangzhou Zhao (Xi’an Jiaotong University) Guochun Xiao (Xi’an Jiaotong University) Min Liu (Xi’an Jiaotong University) Daoshu Yang (Xi’an Jiaotong University)
저널정보
전력전자학회 JOURNAL OF POWER ELECTRONICS JOURNAL OF POWER ELECTRONICS Vol.17 No.2
발행연도
2017.3
수록면
346 - 357 (12page)

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초록· 키워드

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The Modular Multilevel Converter (MMC) is particularly attractive for medium and high power applications such as High-Voltage Direct Current (HVDC) systems. In order to reach a high voltage, the number of cascaded submodules (SMs) is generally very large. Thus, in the applications with hundreds or even thousands of SMs such as MMC-HVDCs, the sorting algorithm of the conventional voltage balancing strategy is extremely slow. This complicates the controller design and increases the hardware cost tremendously. This paper presents a Two-Way Merge Sort (TWMS) strategy based on the prediction of the capacitor voltages under ideal conditions. It also proposes an innovative Insertion Sort Correction for the TWMS (ISC-TWMS) to solve issues in practical engineering under non-ideal conditions. The proposed sorting methods are combined with the features of the MMC-HVDC control strategy, which significantly accelerates the sorting process and reduces the implementation efforts. In comparison with the commonly used quicksort algorithm, it saves at least two-thirds of the sorting execution time in one arm with 100 SMs, and saves more with a higher number of SMs. A 501-level MMC-HVDC simulation model in PSCAD/EMTDC has been built to verify the validity of the proposed strategies. The fast speed and high efficiency of the algorithms are demonstrated by experiments with a DSP controller (TMS320F28335).

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Abstract
I. INTRODUCTION
II. PROPOSED TWMS STRATEGY UNDER IDEAL CONDITIONS
III. PROPOSED ISC-TWMS STRATEGY UNDER NON-IDEAL CONDITIONS
IV. SIMULATION AND EXPERIMENTAL RESULTS
V. CONCLUSIONS
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UCI(KEPA) : I410-ECN-0101-2017-560-002321197