지원사업
학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
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연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 자료유형
- 학술대회자료
- 저자정보
- 발행연도
- 2013.11
- 수록면
- 384 - 387 (4page)
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초록· 키워드
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This paper proposes a low-power two-variable logic circuit based on mixed voltage-mode/current-mode logic design. The voltage-and current-mode operations can be selected for low power consumption at low and high frequency, respectively, according to speed requirement. An nMOS pass transistor network is shared to realize voltage switching and current steering for the voltate- and current-mode operations, respectively, which leads to high utilization of the hardware resorces. As aresult, the power consumption of the hybrid two-variable logic circuit is lower than that of the conventional two-input look-up table (LUT) using CMOS transmission gates, when the operating frequency is more than 800 ㎒. The delay and area of the hybrid two-variable logic circuit are increased by only 7% and 13%, respectively.
목차
Abstract
Ⅰ. INTRODUCTION
Ⅱ. REVIEW OF THE FINE-GRAIN RECONFIGURABLE VLSI ARCHITECTURE
Ⅲ. VOLTAGE-MODE/CURRENT-MODE HYBRID TWO-VARIABLE LOGIC CIRCUIT (HYLC)
Ⅳ. EVALUATION
Ⅴ. CONCLUSION
REFEENCES
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UCI(KEPA) : I410-ECN-0101-2016-569-001049344