지원사업
학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
커뮤니티
연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 자료유형
- 학술대회자료
- 저자정보
- 발행연도
- 2013.11
- 수록면
- 298 - 301 (4page)
이용수
초록· 키워드
오류제보하기
With the evolution of modern verification methodologies, system-level verification using constrained-random stimulus is a high priority, especially in very large communication applications. A key goal to address is providing fast, effective test coverage. In this paper, we propose a novel method to achieve this goal using a genetic algorithm. First, we present background information about coverage-driven verification methodology, as well as the basic concept and process of the genetic algorithm. Next, we discuss the details of the novel method for integrating this algorithm into a practical verification process. Thereafter, we introduce a simple simulation platform coded in C for benchmarking the proposed method, and present results which illustrate a sharp reduction in the times to complete all coverage bins compared to the traditional test coverage method. Finally, we use a peripheral component interconnect express (PCIE) system as a case study to show the effectiveness of the proposed method in a real application.
목차
Abstract
Introduction
Genetic Algorithm
Novel Method
Experimental Results
Conclusions
Reference
참고문헌 (0)
참고문헌 신청이 논문의 저자 정보
최근 본 자료
댓글(0)
0
UCI(KEPA) : I410-ECN-0101-2016-569-001049102