지원사업
학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
커뮤니티
연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 자료유형
- 학술대회자료
- 저자정보
- 발행연도
- 2013.11
- 수록면
- 111 - 114 (4page)
이용수
초록· 키워드
오류제보하기
In this paper, a low-power area-efficient high-voltage (HV) linear amplifier using a current feedback (CFB) topology is proposed for driving integrated 2-D ultrasound transducer array. The CFB topology reduces power consumption of the HV linear amplifier by fixing bandwidth independent of voltage gain. Also, integration of the circuit underneath an ultrasound transducer saves the area by reducing the number of buffering laterally double-diffused MOSFETs (LDMOSFETs) driving capacitive load of the connection cable between front-end circuit and the ultrasound transducer array. Simulation results are obtained by using HSPICE in a 0.18 ㎛ CMOS process with 50 V LDMOSFET devices. The voltage gain is 42.9 ㏈ at 3 ㏈ cut-off frequency of 6.2 ㎒. The total static power consumption and the chip area are 5.6 ㎿ and 0.017 ㎟, respectively. This results show that the circuit is suitable for driving integrated 2-D ultrasound transducer array.
목차
Abstract
Ⅰ. INTRODUCTION
Ⅱ. HIGH-VOLTAGE AMPLIFIER ARCHITECTURE
Ⅲ. CIRCUIT DESIGN
Ⅳ. SIMULATION RESULTS
Ⅴ. CONCLUSION
REFERENCES
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