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논문 기본 정보

자료유형
학술저널
저자정보
Jong-Tae Sung (kumoh Nation Institute of Technology) Young-Hyung Kim (kumoh Nation Institute of Technology) Yong-Hwan Lee (kumoh Nation Institute of Technology)
저널정보
한국정보기술학회 JOURNAL OF ADVANCED INFORMATION TECHNOLOGY AND CONVERGENCE JOURNAL OF ADVANCED INFORMATION TECHNOLOGY AND CONVERGENCE, VOL. 4, NO. 2
발행연도
2014.12
수록면
25 - 35 (11page)
DOI
10.14801/JAITC.2014.4.2.25

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초록· 키워드

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The object recognition is applied to mobile devices and home appliances recently. Accordingly, The SIFT algorithm draws attention for feature point extraction. However, since its process needs excessive amount of computations and memory accesses, SIFT is not a suitable algorithm to implement in software for real-time embedded applications. To solve this problem, we propose a method to implement the SIFT algorithm efficiently. The method changes the computation order to preferentially compute the pixel values required to filter the input image. The second step is that FIFO buffers are used to save next computation images in advance and parallelism is achieved to concurrently perform filtering the images with all Gaussian filters that have different variance values. Finally, the method concurrently subtracts these generated Gaussian images. As a result, this hardware can extract feature points on qVGA(320x240) image in real-time. The proposed hardware is implemented with the Virtex4-LX60 FPGA and the performance is 111fps at 206MHz.

목차

Abstract
1. Introduction
2. Extracting feature point with SIFT algorithm
3. Proposed algorithm for hardware design
4. Design verification
5. Conclusion
References

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