지원사업
학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
커뮤니티
연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 대한전자공학회 JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE Journal of Semiconductor Technology and Science Vol.14 No.5
- 발행연도
- 2014.10
- 수록면
- 673 - 681 (9page)
이용수
초록· 키워드
오류제보하기
In this paper, a novel low specific onresistance SOI LDMOS Device with P<SUP>+</SUP>P-top layer in the drift region is proposed and investigated using a two dimensional device simulator, MEDICI. The structure is characterized by a heavily-doped P<SUP>+</SUP> region which is connected to the P-top layer in the drift region. The P<SUP>+</SUP> region can modulates the surface electric field profile, increases the drift doping concentration and reduces the sensitivity of the breakdown voltage on the geometry parameters. Compared to the conventional D-RESURF device, a 25.8% decrease in specific on-resistance and a 48.2% increase in figure of merit can be obtained in the novel device. Furthermore, the novel P<SUP>+</SUP>P-top device also present cost efficiency due to the fact that the P<SUP>+</SUP> region can be fabricated together with the P-type body contact region without any additional mask.
목차
Abstract
I. INTRODUCTION
II. STRUCTURE AND MECHANISM
III. RESULTS AND DISCUSSIONS
IV. CONCLUSIONS
REFERENCES
참고문헌 (0)
참고문헌 신청이 논문의 저자 정보
최근 본 자료
댓글(0)
0