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논문 기본 정보

자료유형
학술저널
저자정보
Ming Li (Xi’an Jiaotong University) Yue Wang (Xi’an Jiaotong University) Xiong Fang (Xi’an Jiaotong University) Yuan Gao (Xi’an Jiaotong University) Zhaoan Wang (Xi’an Jiaotong University)
저널정보
전력전자학회 JOURNAL OF POWER ELECTRONICS JOURNAL OF POWER ELECTRONICS Vol.14 No.6
발행연도
2014.11
수록면
1,334 - 1,344 (11page)

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초록· 키워드

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A novel single phase Phase-Locked Loop (PLL) is proposed in this paper to accurately and rapidly estimate the instantaneous phase angle of a grid. A conjugate rotating vector pair is proposed and defined to synthesize the single phase signal in the stationary reference frame. With this concept, the proposed PLL innovatively sets one phase input of the PARK transformation to a constant zero. By means of a proper cancellation, a zero steady state phase angle estimation error can be achieved, even under magnitude and frequency variations. The proposed PLL structure is presented together with guidelines for parameters adjustment. The performance of the proposed PLL is verified by comprehensive experiments. Satisfactory phase angle estimation can be achieved within one input signal cycle, and the estimation error can be totally eliminated in four input cycles for the most severe conditions.

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Abstract
I. INTRODUCTION
II. SYNTHESIS OF A SINGLE PHASE SIGNAL
III. THE PROPOSED PLL
IV. EXPERIMENTS AND COMPARISONS
V. CONCLUSIONS
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UCI(KEPA) : I410-ECN-0101-2015-500-002645483