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논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 대한전기학회 Journal of Electrical Engineering & Technology Journal of Electrical Engineering & Technology Vol.9 No.5
- 발행연도
- 2014.9
- 수록면
- 1,654 - 1,659 (6page)
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초록· 키워드
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Tunneling field-effect transistors (TFETs) are very applicable to low standby-power application by their virtues of low off-current (I<SUB>off</SUB>) and small subthreshold swing (S). However, low on-current (I<SUB>on</SUB>) of silicon-based TFETs has been pointed out as a drawback. To improve I<SUB>on</SUB> of TFET, a gate-all-around (GAA) TFET based on III-V compound semiconductor with InAs/InGaAs/InP multiple-heterojunction structure is proposed and investigated. Its performances have been evaluated with the gallium (Ga) composition (x) for In<SUB>1-x</SUB>Ga<SUB>x</SUB>As in the channel region. According to the simulation results for I<SUB>on</SUB>, I<SUB>off</SUB>, S, and on/off current ratio (I<SUB>on</SUB>/I<SUB>off</SUB>), the device adopting In<SUB>0.53</SUB>Ga<SUB>0.47</SUB>As channel showed the optimum direct-current (DC) performance, as a result of controlling the Ga fraction. By introducing an n-type InGaAs thin layer near the source end, improved DC characteristics and radio-frequency (RF) performances were obtained due to boosted band-to-band (BTB) tunneling efficiency.
목차
Abstract
1. Introduction
2. Device Characteristics
3. n+-In0.53Ga0.47As Tunneling-boost Layer
4. Conclusion
References
참고문헌 (26)
참고문헌 신청
1. [학술지(정기간행물)] - Woo Young Choi / 2007 / Tunneling Field-Effect Transistors(TFETs)With Subthreshold Swing(SS)Less Than 60 mV/dec / IEEE Electron Device Lett 28 : 743 ~ 745
2. [학술지(정기간행물)] - Qin Zhang / 2006 / Low-Subthreshold-Swing Tunnel Transistors / IEEE Electron Device Lett 27 : 297 ~ 300
3. [학술지(정기간행물)] - Osama M. Nayfeh / 2008 / Design of Tunneling Field-Effect Transistors Using Strained-Silicon/Strained-Germanium Type-II Staggered Heterojunctions / IEEE Electron Device Lett 29 : 1074 ~ 1077
4. [학술지(정기간행물)] - Yasin Khatami / 2009 / Steep Subthreshold Slope n-and p-Type Tunnel-FET Devices for Low-Power and Energy-Efficient Digital Circuits / IEEE Electron Device Lett 56 : 2752 ~ 2761
5. [학술지(정기간행물)] - Eng-Huat Toh / 2007 / Device physics and design of double-gate tunneling field-effect transistor by silicon film thickness optimization / Appl. Phys. Lett 90 : 263507 ~
2. [학술지(정기간행물)] - Qin Zhang / 2006 / Low-Subthreshold-Swing Tunnel Transistors / IEEE Electron Device Lett 27 : 297 ~ 300
3. [학술지(정기간행물)] - Osama M. Nayfeh / 2008 / Design of Tunneling Field-Effect Transistors Using Strained-Silicon/Strained-Germanium Type-II Staggered Heterojunctions / IEEE Electron Device Lett 29 : 1074 ~ 1077
4. [학술지(정기간행물)] - Yasin Khatami / 2009 / Steep Subthreshold Slope n-and p-Type Tunnel-FET Devices for Low-Power and Energy-Efficient Digital Circuits / IEEE Electron Device Lett 56 : 2752 ~ 2761
5. [학술지(정기간행물)] - Eng-Huat Toh / 2007 / Device physics and design of double-gate tunneling field-effect transistor by silicon film thickness optimization / Appl. Phys. Lett 90 : 263507 ~
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