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논문 기본 정보

자료유형
학술저널
저자정보
Kaliamoorthy Mylsamy (PSNA College of Engineering and Technology) Rajasekaran Vairamani (PSNA College of Engineering and Technology) Gerald Christopher Raj Irudayaraj (PSNA College of Engineering and Technology) Hubert Tony Raj Lawrence (Christian College of Engineering and Technology)
저널정보
전력전자학회 JOURNAL OF POWER ELECTRONICS JOURNAL OF POWER ELECTRONICS Vol.14 No.3
발행연도
2014.5
수록면
507 - 518 (12page)

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This paper presents a new cascaded asymmetrical single phase multilevel converter with a lower number of power semiconductor switches and isolated DC sources. Therefore, the number of power electronic devices, converter losses, size, and cost are reduced. The proposed multilevel converter topology consists of two H-bridges connected in cascaded configuration. One H-bridge operates at a high frequency (high frequency inverter) and is capable of developing a two level output while the other H-bridge operates at the fundamental frequency (low frequency inverter) and is capable of developing a multilevel output. The addition of each power electronic switch to the low frequency inverter increases the number of levels by four. This paper also introduces a hybrid switching algorithm which uses very simple arithmetic and logical operations. The simplified hybrid switching algorithm is generalized for any number of levels. The proposed simplified switching algorithm is developed using a TMS320F2812 DSP board. The operation and performance of the proposed multilevel converter are verified by simulations using MATLAB/SIMULINK and experimental results.

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Abstract
Ⅰ. INTRODUCTION
Ⅱ. CIRCUIT TOPOLOGY
Ⅲ. GENERALIZED PWM MODULATION TECHNIQUE
Ⅳ. CONVERTER LOSSES
Ⅴ. SIMULATION RESULTS
Ⅵ. EXPERIMENTAL RESULTS
Ⅶ. CONCLUSIONS
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