지원사업
학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
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연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 자료유형
- 학술대회자료
- 저자정보
- 발행연도
- 2012.10
- 수록면
- 273 - 276 (4page)
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초록· 키워드
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This paper presents a high-speed CMOS OP Amp with a dynamic switching bias circuit capable of processing video signals of over 2 MHz with slight nonlinearity and low dissipated power. The OP Amp, capable of operating at 10 MHz dynamic switching rate, was designed and showed through simulations a dissipated power of 60 % of that in conventional continuous operation. A switched capacitor (SC) non-inverting amplifier with a gain of 2 employing this OP Amp and its high-speed 10 MHz dynamic switching operation, capable of processing video signals, was demonstrated. By increasing the switching duty ratio to 70 %, its power dissipation decreased to 62 % of that in normal operation. The output voltage inaccuracy for a SC amplifier with a gain of below 2 was below 1 % and mainly caused by the static nonlinearity of the OP Amp. This circuit configuration should be very useful in realizing low-power wide-band signal processing ICs.
목차
Abstract
1. INTRODUCTION
2. DSB THREE-STAGE OP AMP
3. SIMULATION RESULTS
4. APPLICATION TO SWITCHED CAPACITOR AMP
5. CONCLUSIONS
REFERENCES
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