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논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 대한전자공학회 JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE Journal of Semiconductor Technology and Science Vol.13 No.1
- 발행연도
- 2013.2
- 수록면
- 58 - 64 (7page)
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초록· 키워드
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In this paper, two new flip-flop circuits with PCRAM latches that are FF-1 and FF-2, respectively, are proposed not to waste leakage during sleep time. Unlike the FF-1 circuit that has a normal PCRAM latch, the FF-2 circuit has a selective write latch that can reduce the switching activity in writing operation to save switching power at sleep-in moment. Moreover, a sequential sleep-in control is proposed to reduce the rush current peak that is observed at the sleep-in moment. From the simulation of storing ‘000000’ to the PCRAM latch, we could verify that the proposed FF-1 and FF-2 consume smaller power than the conventional 45-nm FF if the sleep time is longer than 465 μs and 95 μs, respectively, at 125°C. For the rush current peak, the sequential sleep-in control could reduce the current peak as much as 77%.
목차
Abstract
I. INTRODUCTION
II. TWO PCRAM FLIP-FLOP CIRCUITS AND SEQUENTIAL SLEEP-IN CONTROL
III. PCRAM MODEL AND SIMULATION
IV. CONCLUSIONS
REFERENCES
참고문헌 (7)
참고문헌 신청
1. [학술지(정기간행물)] - D. Ielmini / 2004 / Analysis of phase distribution in phase-change non-volatile memories / IEEE Electron Device Lett. 25 (7) : 507 ~ 509
2. [학술지(정기간행물)] - F. Bedeschi / 2009 / A bipolar-selected phasechange memory featuring multi-level cell storage / IEEE Journal of Solid-State Circuits 44 (1) : 217 ~ 227
3. [기타자료] - Edward J. Spall / 2008 / Phase change memory latch, U.S. Patent, 7 471 554
4. [학술지(정기간행물)] - C. M. Jung / 2012 / Zero-Sleep-Leakage Flip-Flop Circuit With Conditional-Storing Memristor Retention Latch / IEEE TRANSACTIONS ON NANOTECHNOLOGY 11 (2) : 360 ~ 366
5. [학술대회논문] - J. M. Choi / 2012 / PCRAM Flip-Flop circuit with sequential sleep-in control scheme / The 19th Korean conference on Semiconductors : 356 ~ 357
2. [학술지(정기간행물)] - F. Bedeschi / 2009 / A bipolar-selected phasechange memory featuring multi-level cell storage / IEEE Journal of Solid-State Circuits 44 (1) : 217 ~ 227
3. [기타자료] - Edward J. Spall / 2008 / Phase change memory latch, U.S. Patent, 7 471 554
4. [학술지(정기간행물)] - C. M. Jung / 2012 / Zero-Sleep-Leakage Flip-Flop Circuit With Conditional-Storing Memristor Retention Latch / IEEE TRANSACTIONS ON NANOTECHNOLOGY 11 (2) : 360 ~ 366
5. [학술대회논문] - J. M. Choi / 2012 / PCRAM Flip-Flop circuit with sequential sleep-in control scheme / The 19th Korean conference on Semiconductors : 356 ~ 357
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UCI(KEPA) : I410-ECN-0101-2014-569-000245291