The semiconductor industry, such as significant CPU SYSTEM LSI (Large Scale Integrated circuit) and Memory can be divided into areas. Especially in recent memory, part of Dynamic Random Access Memory (DRAM) and Flash memory technologies with the (technology) has shown a marked development. For example, its fragmentary 2001 ITRS (Internal Technology Roadmap for Semiconductor) in the nonvolatile (Non-Volatile Memory, NVM) technology requirement roadmap has been added. With this trend, many memory manufacturers to present the development and mass production of NVM devices has progressed. Of particular interest in the NVM products Micro Processor Unit (MPU) or different perspective and scaling in DRAM products for NVM technology node (technology node) of the tunnel insulating film thickness (tunnel oxide thickness), write / erase voltages (program / erase voltage), data maintenance (data retention) SYSTEM LSI products with characteristics different from reduced (scaling) is progressing slowly, since the generation of 65nm design rule also in the reduction (scaling) is not a constant, and is characterized by: These flash memory devices require the unique characteristics of the end (intrinsic quality) is required to improve. In this study, the most important factor in NVM devices (critical factor) NAND flash tunnel oxide is improved through the Thickness variation was studied for ways to improve reliability.