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논문 기본 정보
- 자료유형
- 학술대회자료
- 저자정보
- 발행연도
- 2010.11
- 수록면
- 384 - 387 (4page)
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This article proposes an original design flow for the fast prototyping of image processing on a MP-SoC (Multi-Processors System on Chip) architecture. Developing processors network systems tailored to a particular application domain is critical and design-time consuming in order to achieve high-performance customized solutions. The effectiveness of such approaches largely depends on the availability of an ad hoc design methodology. This paper illustrates a new design flow that enables to instantiate a generic Homogeneous Network of Communicating Processors (called HNCP) tailored for a targeted application. The HNCP is generated with a tool that avoids fastidious manual editing operations for the designer. Specific lightweight communication functions have been developed to fasten the programming of the MP-SoC network. A case study (image texture analyzes) is presented to illustrate the proposed MP-SoC design methodology and enables to focus on architecture exploration, instantiated scheme of parallelization and timing performance.
목차
Abstract
Ⅰ. INTRODUCTION
Ⅱ. STATE OF THE ART
Ⅲ. PROPOSED MP-SOC DESIGN METHODOLOGY
Ⅳ. PARALLEL PROGRAMMING
Ⅴ. A CASE STUDY
Ⅵ. CONCLUSION AND PROSPECTS
REFERENCES
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UCI(KEPA) : I410-ECN-0101-2013-569-001489760