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지원사업
학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
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논문 기본 정보
- 자료유형
- 학술대회자료
- 저자정보
- 발행연도
- 2011.11
- 수록면
- 298 - 301 (4page)
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초록· 키워드
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This paper presents a novel CMOS signal conditioning circuit for various resistive sensor applications. The presented circuit provides on-chip differential frequency output representative of change in the input quantity being measured. The circuit includes two identical resistance-to-frequency (R-F) converter channels each with a sensor, a low-noise signal conditioning module and a voltage-controlled oscillator of which the output is coupled to the sensor part. One of the channels uses an unexposed sensor while the other uses an exposed sensor. The frequency difference between outputs of two channels is obtained by on-chip sampling technique. The complete circuit is designed and simulated in 180 nm UMC CMOS process. The entire design area is 360μm x 360 μm and average power consumption of the whole circuit is 850 μW while operating with 1.8V DC supply. It is shown that the circuit is insensitive to the first order temperature and environmental noise because frequency drift of two channels is canceled at the output of difference frequency generator. Simulation results show that sensitivity of 0.95Hz/ppm is achieved which matches calculated sensitivity of 1Hz/ppm. Accuracy of differential frequency measurement circuit is ±0.5Hz for frequency range of 5 KHz to 50KHz. Linearity error is 3.5 %
목차
Abstract
I. INTRODUCTION
II. CIRCUIT DESCRIPTION AND ANALYSIS
III. SIMULATION RESULTS
IV. CONCLUSION
ACKNOWLEDGMENT
REFERENCES
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UCI(KEPA) : I410-ECN-0101-2013-569-001474974