지원사업
학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
커뮤니티
연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 자료유형
- 학술대회자료
- 저자정보
- 발행연도
- 2011.11
- 수록면
- 203 - 206 (4page)
이용수
초록· 키워드
오류제보하기
A vertical-MOSFET-based digital core circuit with vector matching function is proposed for achieving high-speed and low-power operation. The circuit designs with both planar and vertical MOSFET model are performed under 180nm CMOS technology, and the circuit operation is verified by NanoSim hardware simulation. Comparing with the conventional planar MOSFET case, the power consumption of the vertical MOSFET based circuit achieves more than 30% reduction without dependence on operating frequency. Furthermore, as circuit delay time can be suppressed, the vertical MOSFET based circuit also achieves the much higher maximum operating frequency than the planar MOSFET case up to 360MHz under the exactly same simulation conditions. This proposed core circuit can be flexibly utilized not only as an independent vector matching circuit but also as a unit circuit in the multi-core vector matching system.
목차
Abstract
I. INTRODUCTION
II. FEATURES OF VERTICAL MOSFETS
III. VERTICAL-MOSFET-BASEDVECTOR MATCHING CIRCUIT
IV. RESULTS AND DISCUSSIONS
V. CONCLUSIONS
ACKNOWLEDGMENT
REFERENCES
참고문헌 (0)
참고문헌 신청이 논문의 저자 정보
최근 본 자료
댓글(0)
0
UCI(KEPA) : I410-ECN-0101-2013-569-001474752