지원사업
학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
커뮤니티
연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 자료유형
- 학술대회자료
- 저자정보
- 발행연도
- 2011.11
- 수록면
- 183 - 186 (4page)
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초록· 키워드
오류제보하기
In the field of embedded systems, where evergrowing demands for short time-to-market, low cost, low power, high performance and increased flexibility are prevalent, modern FPGAs (Field Programmable Gate Arrays) are gaining wider popularity in a variety of applications. Moreover, capability of DPR (Dynamic Partial Reconfiguration) found in some of these devices can further help in meeting these demands. With the increasing trend to integrate multiple functions into a single device, programming difficulty, well known for FPGAs, and the complexity of management of dynamically reconfigurable resources drive the need for an OS (Operating System). The OS would provide a well-defined computing model abstracting details and capacity of the underlying hardware. This paper familiarizes the readers with the topic of DPR, pointing out its advantages and limitations, and a related HW (hardware) multitasking computing model. Furthermore, it presents results of an ongoing research on an efficient hardware platform for HW multitasking and an accompanying OS extension which facilitates its programmability and serves as a base for fully fledged DPR embedded systems.
목차
Abstract
I. INTRODUCTION
II. BASICS CONCEPTS IN DPR AND HW MULTITASKING
III. PREVIOUS RESEARCH
IV. OS EXTENSION
V. HARDWARE PLATFORM AND DESIGN FLOW
VI. EXPERIMENTAL RESULTS
VII. CONCLUSIONS
REFERENCES
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UCI(KEPA) : I410-ECN-0101-2013-569-001474707