메뉴 건너뛰기
.. 내서재 .. 알림
소속 기관/학교 인증
인증하면 논문, 학술자료 등을  무료로 열람할 수 있어요.
한국대학교, 누리자동차, 시립도서관 등 나의 기관을 확인해보세요
(국내 대학 90% 이상 구독 중)
로그인 회원가입 고객센터 ENG
주제분류

추천
검색
질문

논문 기본 정보

자료유형
학술대회자료
저자정보
Jungil Ahn (POSTECH) Jinwook Kim (POSTECH) Young Hwan Kim (POSTECH)
저널정보
대한전자공학회 대한전자공학회 ISOCC ISOCC 2011 Conference
발행연도
2011.11
수록면
175 - 178 (4page)

이용수

표지
📌
연구주제
📖
연구배경
🔬
연구방법
🏆
연구결과
AI에게 요청하기
추천
검색
질문

초록· 키워드

오류제보하기
In the state-of-the-art VLSI designs, the importance of leakage current estimation is significantly growing. This paper presents a new approach to leakage current modeling, which is to be used for GPGPU (General-Purpose Computing on Graphics Processing Units) systems. In the traditional leakage estimation, statistical approaches are used to compromise with the huge computational complexity that the Monte-Carlo (MC) analysis requires. However, these approaches are known to be inaccurate due to the inherent modeling difficulty. In contrast, the recent development of computing technology is making the use of GPGPU widely popular where parallel processing is possible, and MC analysis is certainly one of the very promising application areas. In this paper, we investigate the modeling accuracy of two piecewise polynomial interpolation methods, i.e., piecewise linear and cubic spline, for leakage estimation in comparison with traditional statistical approaches. The experimental results illustrates that the proposed approach provides much higher accuracy than the statistical approaches, exhibiting less than 5% and 2% errors in case of piecewise-linear and cubic spline interpolation methods, respectively, when compared to HSPICE estimation results.

목차

Abstract
I. INTRODUCTION
II. EXISTING LEAKAGE MODEL
III. LEAKAGE ANALYSIS WITH PIECEWISE POLYNOMIAL INTERPOLATION
IV. EXPERIMENTS
V. CONCLUSION
ACKNOWLEDGMENT
REFERENCES

참고문헌 (0)

참고문헌 신청

이 논문의 저자 정보

최근 본 자료

전체보기

댓글(0)

0

UCI(KEPA) : I410-ECN-0101-2013-569-001474681