지원사업
학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
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연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 자료유형
- 학술대회자료
- 저자정보
- 발행연도
- 2011.11
- 수록면
- 167 - 170 (4page)
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초록· 키워드
오류제보하기
D-FFs play an important role in CMOS digital circuits, because the delay, area and power consumption of D-FFs significantly affect the performance of VLSI chips. We propose two types of semi-static TSPC D-FFs using split-output latch which improve the HSTSPC D-FF. One is a double split-output semi-static TSPC D-FF (DSSTSPC D-FF), which is a speed-efficient design, and the other is a single split-output semi-static TSPC D-FF (SSSTSPC DFF), which is a power and area-efficient design. The former achieves 4% less the delay than the HSTSPC D-FF. The latter achieves 31% smaller area and 30% lower power consumption than the conventional D-FF.
목차
Abstract
I. INTRODUCTION
II. RELATED WORKS AND CLASSIFICATION OF D-FFS
III. HIGH-PERFORMANCE SEMI-STATIC TSPC D-FF
IV. PROPOSED D-FFS
V. EXPERIMENTAL RESULTS
VI. CONCLUSIONS
ACKNOWLEDGMENTS
REFERENCES
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UCI(KEPA) : I410-ECN-0101-2013-569-001474661