지원사업
학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
커뮤니티
연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 자료유형
- 학술대회자료
- 저자정보
- 발행연도
- 2011.11
- 수록면
- 120 - 123 (4page)
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초록· 키워드
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A low-noise amplifier (LNA) for wideband wireless systems faces many challenges like small noise figure and high linearity. Usually these performances are the trade-offs with power consumption. In this work, we propose a CMOS LNA that integrates three circuit techniques, including a multi-gate distortion cancellation, noise suppression feedback, and bandwidth extension for performance improvement with low power. The LNA uses a 0.18?.?.m CMOS and dissipates 1.5 mW from a 1.2V supply voltage. The voltage gain is 14 dB. The measured IIP3 is 5 dBm at 500 MHz that is 9 dB enhanced by the distortion cancellation. The noise figure at low frequency is 4.3 dB, that is 3.2 dB improved by the noise suppression technique. The voltage-enhanced network extends the 3-dB bandwidth to 2.95 GHz and achieves a minimum noise figure of 2.9 dB.
목차
Abstract
I. INTRODUCTION
II. TECHNIQUES FOR PERFORMANCE IMPROVEMENT
III. PROTOTYPE IMPLEMENTATION
IV. EXPERIMENTAL RESULT
V. CONCLUSION
ACKNOWLEDGMENT
REFERENCES
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UCI(KEPA) : I410-ECN-0101-2013-569-001474545